PIC24FV16KA301-E/P Microchip Technology, PIC24FV16KA301-E/P Datasheet - Page 225

• Manufacturer Part Number: PIC24FV16KA301-E/P
• Description: 16KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 12-bit ADC, CTMU, 5V 20 PDIP .300in T
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24FV16KA301-E/P

• Processor Series: PIC24FV
• Core: PIC
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 16 KB
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• Package / Case: PDIP-20
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 17
• Eeprom Size: 512 x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

23.0
The comparator module provides three dual input
comparators. The inputs to the comparator can be
configured to use any one of four external analog
inputs, as well as a voltage reference input from either
the internal band gap reference, divided by 2 (V
or the comparator voltage reference generator.
FIGURE 23-1:
 2011 Microchip Technology Inc.
Note:
CCH<1:0>
CREF
C
C
C
V
C
CV
X
X
X
BG
X
COMPARATOR MODULE
INB
INC
IND
INA
REF
/2
Comparator module, refer to the “PIC24F
This data sheet summarizes the features of
this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information on the
Family Reference Manual”, Section 46.
“Scalable
(DS39734).
COMPARATOR MODULE BLOCK DIAGRAM
Select
Comparator
Logic
Input
V
V
V
V
V
V
IN
IN
IN
IN
IN
IN
-
+
-
+
-
+
Module”
C1
C3
C2
BG
PIC24FV32KA304 FAMILY
/2),
EVPOL<1:0>
EVPOL<1:0>
CPOL
CPOL
CPOL
The comparator outputs may be directly connected to
the CxOUT pins. When the respective COE equals ‘1’,
the I/O pad logic makes the unsynchronized output of
the comparator available on the pin.
A simplified block diagram of the module is shown in
Figure
comparator configurations are shown in
Each comparator has its own control register,
CMxCON
its operation. The output and event status of all three
comparators is provided in the CMSTAT register
(Register
Trigger/Interrupt
Trigger/Interrupt
Trigger/Interrupt
23-1. Diagrams of the possible individual
23-2).
(Register
Logic
Logic
Logic
23-1), for enabling and configuring
COE
COE
COE
CEVT
CEVT
COUT
CEVT
COUT
COUT
DS39995B-page 225
C3OUT
C1OUT
C2OUT
Figure
Pin
Pin
Pin
23-2.