SST25VF512A-33-4I-QAE-T Microchip Technology, SST25VF512A-33-4I-QAE-T Datasheet - Page 10

• Manufacturer Part Number: SST25VF512A-33-4I-QAE-T
• Description: 2.7V To 3.6V 512Kbit SPI Serial Flash 8 TDFN-S 6x5x0.8mm T/R
• Manufacturer: Microchip Technology

Specifications of SST25VF512A-33-4I-QAE-T

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 512K (64K x 8)
• Speed: 33MHz
• Interface: SPI Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-WDFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Data Sheet
High-Speed-Read (33 MHz)
The High-Speed-Read instruction supporting up to 33 MHz
is initiated by executing an 8-bit command, 0BH, followed
by address bits [A
remain active low for the duration of the High-Speed-Read
cycle. See Figure 5 for the High-Speed-Read sequence.
Following a dummy byte (8 clocks input dummy cycle), the
High-Speed-Read instruction outputs the data starting from
the specified address location. The data output stream is
continuous through all addresses until terminated by a low
©2006 Silicon Storage Technology, Inc.
SCK
CE#
FIGURE 5: H
SO
SI
MODE 3
MODE 0
Note: X = Dummy Byte: 8 Clocks Input Dummy Cycle (V
MSB
0 1 2 3 4 5 6 7 8
IGH
23
-A
-S
0
] and a dummy byte. CE# must
PEED
0B
-R
HIGH IMPEDANCE
EAD
S
EQUENCE
MSB
ADD.
15 16
ADD.
23 24
ADD.
10
IL
or V
31 32
to high transition on CE#. The internal address pointer will
automatically increment until the highest memory address
is reached. Once the highest memory address is reached,
the address pointer will automatically increment to the
beginning (wrap-around) of the address space, i.e. for
4 Mbit density, once the data from address location
07FFFFH has been read, the next output will be from
address location 000000H.
IH
)
X
39 40
MSB
D
OUT
N
47 48
D
512 Kbit SPI Serial Flash
N+1
OUT
55 56
D
N+2
OUT
63 64
SST25VF512A
D
1264 F05.0
N+3
OUT
S71264-02-000
71 72
D
N+4
OUT
80
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