UJA1069TW24/3V0-T NXP Semiconductors, UJA1069TW24/3V0-T Datasheet - Page 55

• Manufacturer Part Number: UJA1069TW24/3V0-T
• Manufacturer: NXP Semiconductors

Specifications of UJA1069TW24/3V0-T

• Operating Supply Voltage (typ): 9/12/15/18/24/28V
• Operating Supply Voltage (min): 5.5V
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 24
• Lead Free Status / RoHS Status: Compliant

NXP Semiconductors
Table 26.
T
voltages are defined with respect to ground. Positive currents flow into the IC.
UJA1069_4
Product data sheet
Symbol
t
Battery monitoring
t
t
Power supply V1; pin V1
t
Power supply V3; pin V3
t
t
Wake-up input; pin WAKE
t
t
Watchdog
t
t
t
Fail-safe mode
t
Reset output; pin RSTN
t
t
t
t
TXDL(dom)(dis)
BAT42(L)
SENSE(L)
V1(CLT)
w(CS)
on(CS)
WU(ipf)
su(CS)
WD(ETP)
WD(LTP)
WD(init)
ret
RSTN(CHT)
RSTN(CLT)
RSTN(INT)
RSTNL
vj
= 40 C to +150 C; V
Dynamic characteristics
Parameter
TXDL permanent dominant
disable time
BAT42 LOW time for
setting PWONS
BAT42 LOW time for
setting BATFI
V1 clamped LOW time
during ramp-up of V1
cyclic sense period
cyclic sense on-time
input port filter time
cyclic sense sample setup
time
earliest watchdog trigger
point
latest watchdog trigger
point
watchdog initializing period watchdog time-out in Start-up
retention time
clamped HIGH time,
pin RSTN
clamped LOW time,
pin RSTN
interrupt monitoring time
reset lengthening time
BAT42
= 5.5 V to 52 V; V
…continued
Conditions
Active mode; V
Start-up mode; V1 active
V3C[1:0] = 10; see
V3C[1:0] = 11; see
V3C[1:0] = 10; see
V3C[1:0] = 11; see
V
V
V3C[1:0] = 11 or 10;
see
programmed Nominal
Watchdog Period (NWP);
Normal mode
programmed nominal
watchdog period; Normal
mode, Standby mode and
Sleep mode
mode
Fail-safe mode; wake-up
detected
RSTN driven LOW internally
but RSTN pin remains HIGH
RSTN driven HIGH internally
but RSTN pin remains LOW
INTN = LOW
after internal or external reset
has been released; RLC = 0
after internal or external reset
has been released; RLC =1
BAT42
BAT42
Figure 13
BAT14
Rev. 04 — 28 October 2009
= 5 V to 27 V
= 27 V to 52 V
= 5.5 V to 27 V; V
TXDL
Figure 13
Figure 13
Figure 13
Figure 13
= 0 V
BAT42
[1]
V
BAT14
Min
20
5
5
229
14
28
345
345
5
30
310
0.45
0.9
229
1.3
115
229
229
0.9
18
LIN fail-safe system basis chip
NWP
1 V; unless otherwise specified. All
NWP -
Typ
-
-
-
-
-
-
-
-
-
-
-
-
-
1.5
-
-
-
-
-
UJA1069
Max
80
20
20
283
18
36
423
423
120
250
390
0.55
1.1
283
1.7
141
283
283
1.1
22
© NXP B.V. 2009. All rights reserved.
NWP
NWP
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Unit
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s
s
s
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