UDA1343TT NXP Semiconductors, UDA1343TT Datasheet - Page 19

• Manufacturer Part Number: UDA1343TT
• Manufacturer: NXP Semiconductors

Specifications of UDA1343TT

• Single Supply Voltage (typ): 3V
• Single Supply Voltage (min): 2.4V
• Single Supply Voltage (max): 3.6V
• Package Type: TSSOP
• Lead Free Status / RoHS Status: Not Compliant

Philips Semiconductors
P
A 1-bit value to program the DAC output polarity.
Table 10 Polarity control of the DAC
P
A 1-bit value to program the ADC output polarity.
Table 11 Polarity control of the ADC
P
A 1-bit value to program the power setting of the DAC.
Table 14 : Data input format settings
M
A 1-bit value to enable or disable the digital mixer (for mixing the ADC signal to the playback signal).
Table 15 Mixer setting
2001 Jul 25
OLARITY CONTROL OF THE
OLARITY CONTROL OF THE
OWER CONTROL OF THE
IXER SETTING
Economy audio CODEC with features
SFOR3
0
0
0
0
0
0
0
0
1
1
1
POLINV DAC
POLINV ADC
MIX
0
1
0
1
0
1
SFOR2
0
0
0
0
1
1
1
1
0
0
:
DAC
DAC
ADC
ADC output is not inverting
DAC output is not inverting
DAC output is inverting
ADC output is inverting
SFOR1
0
0
1
1
0
0
1
1
0
0
:
mixer disabled
mixer enabled
FUNCTION
FUNCTION
FUNCTION
SFOR0
0
1
0
1
0
1
0
1
0
1
:
19
I
LSB-justified; 16 bits
LSB-justified; 18 bits
LSB-justified; 20 bits
MSB-justified
MSB-justified output/LSB-justified 16 bits input
MSB-justified output/LSB-justified 18 bits input
MSB-justified output/LSB-justified 20 bits input
MSB justified output/ LSB-justified 24 bits input
LSB justified, 24 bits
other codes are reserved for future use
2
S-bus
Table 12 Power control of the DAC
S
A 2-bit value (SC1 and SC0) to select the required
external clock frequency (see Table 13).
Table 13 System clock frequency settings
D
A 3-bit value (SFOR3 to SFOR0) to select the required
data format (see Table 14).
YSTEM CLOCK SETTINGS
ATA INPUT FORMAT
SC1
0
0
1
1
PON DAC
0
1
SC0
0
1
0
1
FUNCTION
DAC powered down
DAC powered up
UDA1343TT
Product specification
FUNCTION
FUNCTION
512f
384f
256f
s
s
s