LF398D NXP Semiconductors, LF398D Datasheet - Page 2

• Manufacturer Part Number: LF398D
• Manufacturer: NXP Semiconductors

Specifications of LF398D

• Number Of Sample And Hold Elements: 1
• Power Supply Requirement: Dual
• Single Supply Voltage (typ): Not RequiredV
• Single Supply Voltage (min): Not RequiredV
• Single Supply Voltage (max): Not RequiredV
• Operating Temperature Classification: Commercial
• Pin Count: 14
• Lead Free Status / RoHS Status: Not Compliant

direct connection to TTL, PMOS, and CMOS; differential threshold is
Philips Semiconductors
DESCRIPTION
The LF398 is a monolithic sample-and-hold circuit which utilizes
high-voltage ion-implant JFET technology to obtain ultra-high DC
accuracy with fast acquisition of signal and low droop rate.
Operating as a unity gain follower, DC gain accuracy is 0.002%
typical and acquisition time is as low as 6 s to 0.01%. A bipolar
input stage is used to achieve low offset voltage and wide
bandwidth. Input offset adjust is accomplished with a single pin and
does not degrade input offset drift. The wide bandwidth allows the
LF398 to be included inside the feedback loop of 1 MHz op amps
without having stability problems. Input impedance of 10
high source impedances to be used without degrading accuracy.
P-channel junction FETs are combined with bipolar devices in the
output amplifier to give droop rates as low as 5 mV/min with a 1 F
hold capacitor. The JFETs have much lower noise than MOS
devices used in previous designs and do not exhibit high
temperature instabilities. The overall design guarantees no
feedthrough from input to output in the hold mode even for input
signals equal to the supply voltages.
Logic inputs are fully differential with low input current, allowing
1.4 V. The LF398 will operate from 5 V to 18 V supplies. It is
available in 8-pin plastic DIP and 14-pin plastic SO packages.
FEATURES
ORDERING INFORMATION
2001 Aug 03
14-Pin Plastic Small Outline (SO) Package
8-Pin Plastic Dual In-Line Package (DIP)
Operates from 5 V to 18 V supplies
Less than 10 s acquisition time
TTL, PMOS, CMOS compatible logic input
0.5 mV typical hold step at C
Low input offset
0.002% gain accuracy
Low output noise in hold mode
Input characteristics do not change during hold mode
High supply rejection ratio in sample or hold
Wide bandwidth
Sample-and-hold amplifier
DESCRIPTION
H
= 0.01 F
10
allows
2
PIN CONFIGURATIONS
APPLICATION
TEMPERATURE RANGE
The LF398 is ideally suited for a wide variety of sample-and-hold
applications, including data acquisition, analog-to-digital
conversion, synchronous demodulation, and automatic test setup.
OFFSET VOLTAGE
0 to +70 C
0 to +70 C
OUTPUT
Figure 1. Pin Configurations
INPUT
INPUT
V+
V–
NC
NC
NC
NC
V–
1
2
3
4
1
2
3
4
5
6
7
N Package
D Package
TOP VIEW
TOP VIEW
ORDER CODE
LF398D
LF398N
8
7
6
5
14
13
12
11
10
9
8
LOGIC
LOGIC REFERENCE
C
OUTPUT
h
V
NC
V+
LOGIC
LOGIC REF
NC
C
OS
h
Adj
853-0135 26832
LF398
SL00083
Product data
SOT108-1
SOT97-1
DWG #