S29GL064N90BFI040 Spansion Inc., S29GL064N90BFI040 Datasheet - Page 73

• Manufacturer Part Number: S29GL064N90BFI040
• Manufacturer: Spansion Inc.

Specifications of S29GL064N90BFI040

• Cell Type: NOR
• Density: 64Mb
• Access Time (max): 90ns
• Interface Type: Parallel
• Boot Type: Bottom
• Address Bus: 23/22Bit
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: FBGA
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 8M/4M
• Supply Current: 50mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / RoHS Status: Compliant

16. Erase And Programming Performance
Notes
1. Typical program and erase times assume the following conditions: 25°C, V
2. Under worst case conditions of 90
3. Programming time (typ) is 15 μs (per word), 7.5 μs (per byte).
4. Accelerated programming time (typ) is 12.5 μs (per word), 6.3 μs (per byte).
5. Write buffer Programming time is calculated on a per-word/per-byte basis for a 16-word/32-byte write buffer operation.
6. In the pre-programming step of the Embedded Erase algorithm, all bits are programmed to 00h before erasure.
7. System-level overhead is the time required to execute the command sequence(s) for the program command. See
Notes
1. Sampled, not 100% tested.
2. Test conditions T
October 29, 2008 S29GL-N_01_12
Sector Erase Time
Chip Erase Time
Total Write Buffer Program Time (Notes 3, 5)
Total Accelerated Effective Write Buffer Program Time (Notes 4, 5)
Chip Program Time
on page 53
Parameter Symbol
C
C
C
C
for further information on command definitions.
OUT
IN2
IN3
IN
A
= 25°C, f = 1.0 MHz.
Parameter
#RESET, WP#/ACC Pin Capacitance
°
C; Worst case V
Parameter Description
Control Pin Capacitance
Output Capacitance
Input Capacitance
Table 16.1 TSOP Pin and BGA Package Capacitance
CC
D a t a
, 100,000 cycles.
S29GL-N MirrorBit
S29GL032N
S29GL064N
S29GL032N
S29GL064N
S h e e t
CC
= 3.0V, 10,000 cycles; checkerboard data pattern.
Typ
®
V
Flash Family
V
V
V
OUT
IN
IN
IN
31.5
(Note 1)
240
200
0.5
32
64
63
= 0
= 0
= 0
= 0
Test Setup
(Note 2)
TSOP
TSOP
TSOP
TSOP
Max
128
3.5
BGA
BGA
BGA
BGA
64
Table 10.1 on page 51
Unit
sec
sec
µs
TBD
TBD
TBD
TBD
Typ
27
6
6
6
programming prior
and
Excludes system
level overhead
Excludes 00h
Comments
Max
TBD
TBD
TBD
TBD
Table 10.3
to erasure
10
12
10
30
(Note 6)
(Note 7)
Unit
pF
pF
pF
pF
pF
pF
pF
pF
73