M25PE80-VMN6P NUMONYX, M25PE80-VMN6P Datasheet - Page 22

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M25PE80-VMN6P

Manufacturer Part Number
M25PE80-VMN6P
Description
Flash Mem Serial-SPI 3.3V 8M-Bit 1M x 8 8ns 8-Pin SOIC N Tray
Manufacturer
NUMONYX
Datasheet

Specifications of M25PE80-VMN6P

Package
8SOIC N
Cell Type
NOR
Density
8 Mb
Architecture
Sectored
Block Organization
Symmetrical
Typical Operating Supply Voltage
3.3 V
Sector Size
256Byte x 4096
Timing Type
Synchronous
Operating Temperature
-40 to 85 °C
Interface Type
Serial-SPI
Lead Free Status / RoHS Status
Compliant
Instructions
6.2
22/66
Figure 7.
Write disable (WRDI)
The write disable (WRDI) instruction
The write disable (WRDI) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
The write enable latch (WEL) bit is reset under the following conditions:
Figure 8.
Power-up
Write disable (WRDI) instruction completion
Page write (PW) instruction completion
Page program (PP) instruction completion
Write to lock register (WRLR) instruction completion
Page erase (PE) instruction completion
Sector erase (SE) instruction completion
Bulk erase (BE) instruction completion.
Write enable (WREN) instruction sequence
Write disable (WRDI) instruction sequence
S
C
D
Q
S
C
D
Q
High Impedance
High Impedance
0
0
(Figure
1
1
2
2
Instruction
Instruction
8) resets the write enable latch (WEL) bit.
3
3
4
4
5
5
6
6
7
7
AI03750D
AI02281E
M25PE80

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