MT36VDDF25672Y-40BF3 Micron Technology Inc, MT36VDDF25672Y-40BF3 Datasheet - Page 12

• Manufacturer Part Number: MT36VDDF25672Y-40BF3
• Description: MODULE DDR SDRAM 2GB 184DIMM
• Manufacturer: Micron Technology Inc
• Series: -r

Specifications of MT36VDDF25672Y-40BF3

• Main Category: DRAM Module
• Sub-category: DDR SDRAM
• Module Type: 184RDIMM
• Device Core Size: 72b
• Organization: 256Mx72
• Total Density: 2GByte
• Chip Density: 512Mb
• Maximum Clock Rate: 400MHz
• Operating Supply Voltage (typ): 2.5V
• Operating Current: 3.6A
• Number Of Elements: 36
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Pin Count: 184
• Mounting: Socket
• Memory Type: DDR SDRAM
• Memory Size: 2GB
• Speed: 400MT/s
• Features: -
• Package / Case: 184-RDIMM
• Lead Free Status / RoHS Status: Compliant

I
Table 9:
PDF: 09005aef80772fd2/Source: 09005aef8075ebf6
DDF36C128_256x72.fm - Rev. G 9/08 EN
Parameter/Condition
Operating one bank active-precharge current:
DQ and DQS inputs changing once per clock cycle; Address and control inputs changing
once every two clock cycles
Operating one bank active-read-precharge current: BL = 2;
t
Precharge power-down standby current: All device banks idle; Power-down mode;
t
Idle standby current: CS# = HIGH; All device banks idle;
Address and other control inputs changing once per clock cycle; V
DQS
Active power-down standby current: One device bank active; Power-down mode;
t
Active standby current: CS# = HIGH; CKE = HIGH; One device bank active;
t
Address and other control inputs changing once per clock cycle
Operating burst read current: BL = 2; Continuous burst reads; One device bank
active; Address and control inputs changing once per clock cycle;
I
Operating burst write current: BL = 2; Continuous burst writes; One device bank
active; Address and control inputs changing once per clock cycle;
and DQS inputs changing twice per clock cycle
Auto refresh current
Self refresh current: CKE ≤ 0.2V
Operating bank interleave read current: Four device bank interleaving reads
(BL = 4) with auto precharge;
inputs change only during active READ or WRITE commands
DD
CK =
CK =
CK =
RC =
OUT
= 0mA
Specifications
t
t
t
t
RAS (MAX);
CK (MIN); I
CK (MIN); CKE = LOW
CK (MIN); CKE = LOW
I
Values are for the MT46V64M4 DDR SDRAM only and are computed from values specified in the
256Mb (64 Meg x 4) component data sheet
DD
OUT
Specifications and Conditions – 1GB (Die Revision K)
t
Notes:
CK =
= 0mA; Address and control inputs changing once per clock cycle
t
CK (MIN); DQ and DQS inputs changing twice per clock cycle;
1. Value calculated as one module rank in this operating condition; all other module ranks are
2. Value calculated reflects all module ranks in this operating condition.
t
RC =
in I
DD
t
RC (MIN);
2P (CKE LOW) mode.
t
CK =
1GB, 2GB (x72, ECC, DR) 184-Pin DDR SDRAM RDIMM
t
RC =
t
CK (MIN); Address and control
t
t
RC (MIN);
CK =
12
t
t
RFC =
RFC = 7.8125µs
t
CK (MIN); CKE = HIGH;
t
IN
RC =
t
t
CK =
CK =
= V
t
t
CK =
RFC (MIN)
t
REF
Micron Technology, Inc., reserves the right to change products or specifications without notice.
RC (MIN);
t
t
CK (MIN);
CK (MIN); DQ
for DQ and
t
CK (MIN);
Symbol
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DD
Electrical Specifications
DD
DD
I
I
DD
DD
DD
I
I
I
DD
DD
DD
DD
DD
DD
4W
3N
5A
2P
2F
3P
4R
0
1
5
6
7
1
1
2
2
1
2
2
2
1
2
2
1
©2002 Micron Technology, Inc. All rights reserved.
1,872
2,232
1,800
1,260
2,160
3,312
3,312
5,760
5,292
-40B
144
216
144
1,692
2,142
1,800
1,080
1,980
2,952
2,952
5,760
4,932
-335
144
216
144
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA