CY7C038V-25AC Cypress Semiconductor Corp, CY7C038V-25AC Datasheet - Page 8

• Manufacturer Part Number: CY7C038V-25AC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C038V-25AC

• Density: 1.125Mb
• Access Time (max): 25ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 16b
• Package Type: TQFP
• Operating Temp Range: 0C to 70C
• Number Of Ports: 2
• Supply Current: 165mA
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Word Size: 18b
• Number Of Words: 64K
• Lead Free Status / RoHS Status: Not Compliant

Switching Characteristics
Data Retention Mode
The
CY7037V/037AV/038V are designed with battery backup in
mind. Data retention voltage and supply current are guaranteed
over temperature. The following rules ensure data retention:
Document #: 38-06078 Rev. *B
1. Chip enable (CE) must be held HIGH during data retention, within
2. CE must be kept between V
3. The RAM can begin operation >t
Notes
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
11. For information on port-to-port delay through RAM cells from writing port to reading port, refer to
12. Test conditions used are Load 1.
13. t
14. CE = V
HD
HZWE
LZWE
WDD
DDD
BLA
BHA
BLC
BHC
PS
WB
WH
BDD
INS
INR
SOP
SWRD
SPS
SAA
Busy Timing
Interrupt Timing
Semaphore Timing
Parameter
V
the power up and power down transitions.
mum operating voltage (3.0 volts).
CC
BDD
[13]
[36]
[36]
[9 ,10]
[9, 10]
to V
is a calculated parameter and is the greater of t
CC
CC
, V
in
– 0.2V.
= GND to V
[11]
CY7C027V/027VN/027AV/028V
Data Hold From Write End
R/W LOW to High Z
R/W HIGH to Low Z
Write Pulse to Data Delay
Write Data Valid to Read Data Valid
BUSY LOW from Address Match
BUSY HIGH from Address Mismatch
BUSY LOW from CE LOW
BUSY HIGH from CE HIGH
Port Setup for Priority
R/W HIGH after BUSY (Slave)
R/W HIGH after BUSY HIGH (Slave)
BUSY HIGH to Data Valid
INT Set Time
INT Reset Time
SEM Flag Update Pulse (OE or SEM)
SEM Flag Write to Read Time
SEM Flag Contention Window
SEM Address Access Time
[11]
CC
, T
A
= 25° C. This parameter is guaranteed but not tested.
CC
– 0.2V and 70% of V
Description
RC
Over the Operating Range
after V
WDD
–t
CC
PWE
reaches the mini-
(actual) or t
CC
DDD
during
–t
and
SD
[6]
(actual).
(continued)
Min
Timing
V
13
10
CE
ICC
0
3
5
0
5
5
CC
Parameter
DR1
-15
Max
CY7C027V/027VN/027AV/028V/
10
30
25
15
15
15
15
15
15
15
15
Figure 11
CY7C027V/027VN/027AV/028V
CY7C037V/037AV/038V
3.0V
Min
waveform.
15
10
At VCC
0
3
5
0
5
5
Data Retention Mode
Test Conditions
V
CC
-20
CY7C037V/037AV/038V
V
to V
CC
DR
Max
12
40
30
20
20
20
16
20
20
20
20
> 2.0V
CC
= 2V
– 0.2V
Min
17
12
[14]
0
3
5
0
5
5
3.0V
-25
Max
Max
50
15
50
35
20
20
20
17
25
20
20
25
V
t
IH
RC
Page 8 of 18
Unit
μA
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
[+] Feedback