SCD128410QCE Intel, SCD128410QCE Datasheet - Page 127

• Manufacturer Part Number: SCD128410QCE
• Manufacturer: Intel

Specifications of SCD128410QCE

• Pin Count: 100
• Lead Free Status / RoHS Status: Not Compliant

Datasheet
Bit
7:5
4:3
2:0
Carriage Return (CR) and New Line (NL) Processing: These three bits define the way that the CD1284
processes received CR and NL characters (x’0D and x’0A). The following table shows the actions performed:
Break Processing: The CD1284 can handle received break characters in three ways:
Parity (P), Framing (F), and Overrun (O) Error Special Processing: As with break characters, the CD1284
can treat error characters in several different ways, if enabled:
IGNCR
PEH[2]
IGNBRK
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
ICRNL
PEH[1]
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
BRKINT
IEEE 1284-Compatible Parallel Interface Controller — CD1284
0
1
0
1
INLCR
PEH[0]
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Received break generates an exception service request. End-
of-Break also generates an exception service request if EBD is
enabled in COR5.
Received break treated as a good NULL character.
Not used.
Received break discarded.
No action.
Received NL changed to CR.
Received CR changed to NL.
Received CR changed to NL; NL changed to CR.
Received CR discarded.
Received CR discarded; NL changed to CR.
Received CR discarded.
Received CR discarded; NL changed to CR.
Received P/F/O error characters treated as exception data.
Received P/F/O error characters treated as good data.
Received P/F/O error characters discarded.
Received P/F/O error characters replaced with good NULL
characters.
Received P/F/O error characters are replaced with the two
character sequence x’FF-NULL-character. Good x’FF
characters are replaced with the two character sequence
x’FF-x’FF.
Not used.
Description
Break Action
Action
Action
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