FDC37M817-MS Standard Microsystems (SMSC), FDC37M817-MS Datasheet - Page 192

• Manufacturer Part Number: FDC37M817-MS
• Manufacturer: Standard Microsystems (SMSC)

Specifications of FDC37M817-MS

• Pin Count: 100
• Lead Free Status / RoHS Status: Compliant

Note 1: Maximum value only applies if there is room in the FIFO and terminal count has not been
Note 2: nACK is not considered asserted or deasserted until it is stable for a minimum of 75 to 130 ns.
NAME
t1
t2
t3
t4
t5
t6
PD<7:0>
nACK
received. ECP can stall by keeping nALF low.
nALF
PDATA Valid to nACK Asserted
nALF Deasserted to PDATA Changed
nACK Asserted to nALF Deasserted
(Notes 1,2)
nACK Deasserted to nALF Asserted (Note 2)
nALF Asserted to nACK Asserted
nALF Deasserted to nACK Deasserted
FIGURE 20 - ECP PARALLEL PORT REVERSE TIMING
DESCRIPTION
t4
t1
t5
192
t3
t6
MIN
80
80
0
0
0
0
t4
TYP
t2
MAX
200
200
UNITS
ns
ns
ns
ns
ns
ns