MC9S08QG8CPBE Freescale, MC9S08QG8CPBE Datasheet - Page 6

• Manufacturer Part Number: MC9S08QG8CPBE
• Manufacturer: Freescale

Specifications of MC9S08QG8CPBE

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 20MHz
• Interface Type: I2C/SCI/SPI
• Total Internal Ram Size: 512Byte
• # I/os (max): 12
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 1.8V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 16
• Package Type: PDIP
• Program Memory Type: Flash
• Program Memory Size: 8KB
• Lead Free Status / RoHS Status: Compliant

Revision History
To provide the most up-to-date information, the revision of our documents on the World Wide Web will be
the most current. Your printed copy may be an earlier revision. To verify you have the latest information
available, refer to:
The following revision history table summarizes changes contained in this document.
© Freescale Semiconductor, Inc., 2007-2008. All rights reserved.
2 Draft A
http://freescale.com/
Rev
No.
3
4
5
06/08/2006
Revision
10/2007
11/2009
2/2008
Date
Previous version was 1.01; revision numbering will increment by integers from now
on.
Clarified PTA5 pullup behavior note; clarified that FCDIV is write once after reset;
expanded FPROT/NVPROT register description added note for servicing the COP
if the COP is enabled during an erase function; added requirements for using
ACMP0 in ACMP introduction; added factory trim value section to ICS introduction;
debug section added to Development Support chapter; updated RTI period and
added RTI graph to control timing section; other minor grammar edits.
Added 24-pin QFN package and updated the A-5. DC Characteristics table Supply
Voltage row.
Incorporated core team markups from shared review. See Project Sync issue
#3313 for archive.
Added new part number information for the maskset revision 4.
Corrected bit 0 of KBISC register in the
Description of Changes
Table
4-2.