ICS950811AGLFT IDT, Integrated Device Technology Inc, ICS950811AGLFT Datasheet - Page 14

IC FREQ GEN 200MHZ CLK 56-TSSOP

ICS950811AGLFT

Manufacturer Part Number
ICS950811AGLFT
Description
IC FREQ GEN 200MHZ CLK 56-TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Frequency Generatorr
Datasheet

Specifications of ICS950811AGLFT

Frequency - Max
200MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-TSSOP
Frequency-max
200MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Output
-
Input
-
Other names
800-1818-2
950811AGLFT

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ICS950811
CPU_STOP# - Assertion (transition from logic "1" to logic "0")
PCI_STOP# - Assertion (transition from logic "1" to logic "0")
The impact of asserting the PCI_STOP# signal will be the following. All PCI[6:0] and stoppable PCI_F[2,0] clocks will
latch low in their next high to low transition. The PCI_STOP# setup time tsu is 10 ns, for transitions to be recognized
by the next rising edge.
The impact of asserting the CPU_STOP# pin is all CPU outputs that are set in the I
via assertion of CPU_STOP# are to be stopped after their next transition following the two CPU clock edge sampling
as shown. The final state of the stopped CPU signals is CPUT=High and CPUC=Low. There is to be no change to the
output drive current values. The CPUT will be driven high with a current value equal to (MULTSEL0) X (I REF), the CPUC
signal will not be driven.
CPU_STOP# Functionality
0482E—08/09/07
C
P
U
_
S
0
1
T
PCI_F[2:0] 33MHz
CPU_STOP#
O
P
PCI[6:0] 33MHz
#
PCI_STOP#
CPUC
CPUT
i
e r
N
C
* f
r o
P
U
m
M
T
l a
u
t l
Assertion of CPU_STOP# Waveforms
Assertion of PCI_STOP# Waveforms
tsu
N
C
F
r o
P
o l
U
m
t a
C
14
l a
2
C configuration to be stoppable

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