TFF1003HN/N1,118 NXP Semiconductors, TFF1003HN/N1,118 Datasheet
TFF1003HN/N1,118
Specifications of TFF1003HN/N1,118
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TFF1003HN/N1,118 Summary of contents
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TFF1003HN Low phase noise LO generator for VSAT applications Rev. 01 — 19 May 2010 1. General description The TFF1003HN Oscillator (LO) circuits for K phase noise complies with IESS-308 from Intelsat. CAUTION This device is sensitive ...
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... NXP Semiconductors 5. Ordering information Table 2. Type number TFF1003HN 6. Marking Table 3. Type number TFF1003HN 7. Block diagram lock: 2 lock LCKDET 100 kΩ pull down 8 GND1(REF) 9 IN(REF)_P 10 IN(REF)_N 11 GND2(REF CC(REF) Fig 1. Block diagram TFF1003HN_1 Product data sheet Low phase noise LO generator for VSAT applications ...
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... NXP Semiconductors 8. Functional diagram LCKDET GND1(REF) IN(REF)_P IN(REF)_N GND2(REF) V CC(REF) Fig 2. TFF1003HN_1 Product data sheet Low phase noise LO generator for VSAT applications NSL2 NSL1 NSL0 6 5 lock: 2 lock LOCK DETECTOR 8 9 CPOUT PFD CP DIVIDER 10 PLL GND(DIV) n.c. CC(DIV) Functional diagram All information provided in this document is subject to legal disclaimers. ...
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... NXP Semiconductors 9. Pinning information 9.1 Pinning Fig 3. 9.2 Pin description Table 4. Symbol VREGVCO CPOUT VTUNE NSL0 NSL1 NSL2 LCKDET GND1(REF) 8 IN(REF)_P IN(REF)_N GND2(REF CC(REF) V CC(DIV) GND(DIV) n.c. n.c. GND1(BUF) 17 TFF1003HN_1 Product data sheet Low phase noise LO generator for VSAT applications terminal 1 ...
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... NXP Semiconductors Table 4. Symbol V CC(BUF) GND2(BUF) 19 BUF1_N BUF2_N BUF1_P BUF2_P GND3(BUF) 24 10. Functional description The TFF1003HN consists of the following blocks: • PLL • Output buffer • Lock detector • Reference input • Divider settings The functionality of the blocks will be discussed below. ...
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... NXP Semiconductors VTUNE CPOUT Fig 4. Type 2 loop filter Table 5. f i(ref) (MHz) 50.000 to 50.977 100.000 to 101.953 200.000 to 203.906 400.000 to 407.813 800.000 to 815.625 10.2 Output buffer The output consists of a differential pair with 50 Ω collector resistors R only one output is used, terminate the non used output with the same impedance as the load (see 10 ...
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... NXP Semiconductors Table 6. Logical value 0 1 LCKDET (pin 7) has a pull-down resistor of 100 kΩ to GND1(REF) (pin 8). IN(REF)_P/N(t) upper window detector threshold (93 O(reg)VCO ) VTUNE(t) low window detector threshold ( O(reg)VCO ) IN LOCK 2.2 V LCKDET(t) 0.4 V OUT OF LOCK (0 V) timeline section value determined VTUNE actual PLL status remarks (1) The attack time and decay time are typically 10 μ ...
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... NXP Semiconductors Note that the phase noise of the output signal is also determined by the phase noise of the reference signal. The reference frequency range is equal to the output frequency / division value. Note that the output frequency is guaranteed from 12.8 GHz to 13.05 GHz. 10.5 Divider settings (NSL2, NSL1, NSL0) ...
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... NXP Semiconductors 12. Recommended operating conditions Table 10. NSL0 (pin 4), NSL1 (pin 5) and NSL2 (Pin 6) not changed during operation. Loop filter component values as depicted in Symbol Parameter T amb Z 0 ϕ n(ref) f i(ref) P i(ref) [1] Required reference phase noise is set 10 dB below equivalent input phase noise. ...
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... NXP Semiconductors Table 12. Characteristics …continued Operating conditions of Table 10 Symbol Parameter α LO harmonic rejection H(LO) Lock detector V LOW-level output voltage OL V HIGH-level output voltage OH R pull-down resistance pd Divider setting (NSL0, NSL1, NSL2) R pull-up resistance pu V LOW-level input voltage IL V HIGH-level input voltage ...
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OUT-OF-LOCK LCKDET 7 PROCESSING BLOCK GND1(REF IN(REF) Ω Z 0(dif) = 100 Ω 100 Ω DC block 50 Ω IN(REF)_N 10 REFERENCE SOURCE GND2(REF CC(REF) 12 3.3 V Fig 7. Application ...
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OUT-OF-LOCK LCKDET PROCESSING BLOCK GND1(REF Ω Ω IN(REF)_P 51 Ω DC block 10 nF IN(REF)_N REFERENCE SOURCE not used input terminated with 24 Ω same impedance GND2(REF) V CC(REF) 3.3 V Fig 8. ...
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... NXP Semiconductors 16. Package outline HVQFN24: plastic thermal enhanced very thin quad flat package; no leads; 24 terminals; body 0.85 mm terminal 1 index area terminal 1 24 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...
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... NXP Semiconductors 17. Abbreviations Table 13. Acronym CMOS CP K band u LSB MSB PFD PLL VCO VSAT 18. Revision history Table 14. Revision history Document ID Release date TFF1003HN_1 20100519 TFF1003HN_1 Product data sheet Low phase noise LO generator for VSAT applications Abbreviations Description Complementary Metal Oxide Semiconductor ...
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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...
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... NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any 20. Contact information For more information, please visit: ...
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... NXP Semiconductors 21. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Quick reference data . . . . . . . . . . . . . . . . . . . . . 1 5 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 6 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 7 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2 8 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 9 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 9.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 9.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 10 Functional description . . . . . . . . . . . . . . . . . . . 5 10.1 PLL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 10.2 Output buffer ...