74HC7046AD,112 NXP Semiconductors, 74HC7046AD,112 Datasheet - Page 3

IC PLL W/LOCK DETECTOR 16SOIC

74HC7046AD,112

Manufacturer Part Number
74HC7046AD,112
Description
IC PLL W/LOCK DETECTOR 16SOIC
Manufacturer
NXP Semiconductors
Type
Phase Lock Loop (PLL)r
Series
74HCr
Datasheet

Specifications of 74HC7046AD,112

Number Of Circuits
1
Package / Case
16-SOIC (3.9mm Width)
Pll
Yes
Input
Clock
Output
Clock
Ratio - Input:output
2:3
Differential - Input:output
No/No
Frequency - Max
19MHz
Divider/multiplier
No/No
Voltage - Supply
3 V ~ 6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Frequency-max
19MHz
Supply Voltage (max)
6 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74HC7046AD
74HC7046AD
933827470112
Philips Semiconductors
waveforms for the PC1 loop locked at
f
The frequency capture range (2f
defined as the frequency range of
input signals on which the PLL will
lock if it was initially out-of-lock. The
frequency lock range (2f
as the frequency range of input
signals on which the loop will stay
locked if it was initially in lock. The
capture range is smaller or equal to
the lock range.
With PC1, the capture range depends
on the low-pass filter characteristics
and can be made as large as the lock
range. This configuration retains lock
even with very noisy input signals.
Typical behaviour of this type of
phase comparator is that it can lock to
input frequencies close to the
harmonics of the VCO centre
frequency.
Phase comparator 2 (PC2)
This is a positive edge-triggered
phase and frequency detector. When
the PLL is using this comparator, the
loop is controlled by positive signal
transitions and the duty factors of
SIG
PC2 comprises two D-type flip-flops,
control-gating and a 3-state output
stage. The circuit functions as an
up-down counter (Fig.5) where SIG
causes an up-count and COMP
down-count. The transfer function of
PC2, assuming ripple (f
suppressed,
is:
where V
output at pin 10;
V
filter).
December 1990
o
V
DEMOUT
are shown in Fig.7.
Phase-locked-loop with lock detector
DEMOUT
IN
and COMP
DEMOUT
= V
=
PC2OUT
V
---------- -
4
CC
is the demodulator
IN
are not important.
(via low-pass
SIGIN
r
L
= f
) is defined
i
) is
COMPIN
IN
c
) is
a
IN
The phase comparator gain is:
V
phase differences of SIG
COMP
waveforms for the PC2 loop locked at
f
When the frequencies of SIG
COMP
SIG
p-type output driver at PC2
“ON” for a time corresponding to the
phase difference (
the phase of SIG
COMP
“ON”.
When the frequency of SIG
than that of COMP
output driver is held “ON” for most of
the input signal cycle time, and for
the remainder of the cycle both n and
p- type drivers are “OFF” (3-state). If
the SIG
COMP
n-type driver that is held “ON” for
most of the cycle. Subsequently, the
voltage at the capacitor (C2) of the
low-pass filter connected to PC2
varies until the signal and comparator
inputs are equal in both phase and
frequency. At this stable point the
voltage on C2 remains constant as
the PC2 output is in 3-state and the
VCO input at pin 9 is a high
impedance.
Thus, for PC2, no phase difference
exists between SIG
over the full frequency range of the
VCO. Moreover, the power
dissipation due to the low-pass filter is
reduced because both p and n-type
drivers are “OFF” for most of the
signal input cycle. It should be noted
that the PLL lock range for this type of
phase comparator is equal to the
capture range and is independent of
o
DEMOUT
K
are shown in Fig.9.
p
IN
=
leads that of COMP
IN
IN
IN
IN
IN
V
---------- - V r .
, the n-type driver is held
4
as shown in Fig.8. Typical
are equal but the phase of
frequency, then it is the
is the resultant of the initial
CC
frequency is lower than the
IN
3
IN
DEMOUT
lags that of
IN
, the p-type
and COMP
IN
IN
OUT
IN
). When
and
, the
is higher
IN
is held
and
OUT
IN
the low-pass filter. With no signal
present at SIG
PC2, to its lowest frequency.
APPLICATIONS
FM modulation and demodulation
Frequency synthesis and
multiplication
Frequency discrimination
Tone decoding
Data synchronization and
conditioning
Voltage-to-frequency conversion
Motor-speed control
74HC/HCT7046A
IN
Product specification
the VCO adjusts, via

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