IDT82V3255TFG IDT, Integrated Device Technology Inc, IDT82V3255TFG Datasheet - Page 121

• Manufacturer Part Number: IDT82V3255TFG
• Description: IC PLL WAN SMC STRATUM 3 64-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: PLL Clock Generatorr

Specifications of IDT82V3255TFG

• Input: CMOS, LVDS, PECL
• Output: CMOS, LVDS, PECL
• Frequency - Max: 622.08MHz
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-TQFP, 64-VQFP
• Frequency-max: 622.08MHz
• Function: Wan PLL
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Package Type: TQFP
• Pin Count: 64
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 82V3255TFG

Table 53: Input/Output Clock Timing
8.6
Electrical Specifications
Note:
1. Typical delay provided as reference only.
2. ‘Peak to Peak Delay Variation’ is the delay variation that is guaranteed not to be exceeded for IN11 in Master/Slave operation.
3. Tested when IN11 is selected.
IDT82V3255
The inputs and outputs are aligned ideally. But due to the circuit delays, there is delay between the inputs and outputs.
INPUT / OUTPUT CLOCK TIMING
Symbol
t
t
t
t
t
t
1
2
3
4
5
6
19.44 MHz Output Clock
19.44 MHz Input Clock
8 kHz Input Clock
8 kHz Output Clock
51.84 MHz Input Clock
51.84 MHz Output Clock
6.48 MHz Input Clock
6.48 MHz Output Clock
38.88 MHz Output Clock
25.92 MHz Input Clock
38.88 MHz Input Clock
25.92 MHz Output Clock
Figure 23. Input / Output Clock Timing
Typical Delay
1.4
t
t
t
t
t
t
1
4
1
1
2
3
2
3
4
5
6
1
(ns)
121
Peak to Peak Delay Variation (ns)
1.6
1.6
1.6
1.6
1.6
1.6
December 3, 2008
WAN PLL