LMX2324SLBX National Semiconductor, LMX2324SLBX Datasheet
LMX2324SLBX
Specifications of LMX2324SLBX
LMX2324SLBXTR
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LMX2324SLBX Summary of contents
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... The LMX2324 is manufactured using National's ABiC V BiCMOS process and is packaged in a 16-pin TSSOP and a 16-pin Chip Scale Package (CSP). Functional Block Diagram PLLatinum ™ trademark of National Semiconductor Corporation. TRI-STATE ® registered trademark of National Semiconductor Corporation. © 2010 National Semiconductor Corporation ...
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... Power supply voltage input. Input may range from 2.7V to 5.5V. Bypass capacitors should be placed as close as possible to this pin and be connected directly to the ground plane. 2 101030 Version 8 Revision 1 Print Date/Time: 2010/03/17 20:00:58 CSP 16-Pin Package 10103003 Top View Order Number LMX2324SLBX See NS Package Number SLB16A Description ≥ input threshold CC ...
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... Absolute Maximum Ratings 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Power Supply Voltage ( Power Supply for Charge Pump (V P Voltage on Any Pin with GND = Storage Temperature Range ( Lead Temperature (solder, 4 sec.) (T Electrical Characteristics All min/max specifications are guaranteed by design, or test, or statistical methods ...
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Note 3: Except f and OSC IN in Note 4: See related equations in charge pump current specification definitions Charge Pump Current Specification Definitions − Δ sink current at VCP = ...
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... Functional Description The basic phase-lock-loop (PLL) configuration consists of a high-stability crystal reference oscillator, a frequency synthe- sizer such as the National Semiconductor LMX2324, a volt- age controlled oscillator (VCO), and a passive loop filter. The frequency synthesizer includes a phase detector, current mode charge pump, as well as programmable reference [R] and feedback [N] frequency dividers ...
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Programming Description 2.1 MICROWIRE INTERFACE The LMX2324 register set can be accessed through the MICROWIRE interface. A 18-bit shift register is used as a temporary register to indirectly program the on-chip registers. The shift register consists of a 17-bit ...
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R REGISTER If the Address Bit (ADDR when LE is transitioned high data is transferred from the 18-bit shift register into the 14-bit R register. The R register contains a latch which sets the PLL 10-bit R ...
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N REGISTER If the address bit is LOW (ADDR=0) when LE is transitioned high, data is transferred from the 18-bit shift register into the 17-bit N register. The N register consists of the 5-bit swallow counter (A counter), the ...
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CTL_WORD MSB CNT_RST 101030 Version 8 Revision Print Date/Time: 2010/03/17 20:00:58 LSB N0 PWDN www.national.com ...
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Control Word Truth Table Notes: X denotes don't care. The Counter Reset enable bit when activated allows the reset of both N and R counters. Upon powering up the N counter resumes counting ...
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Phase Comparator and Internal Charge Pump Characteristics π Notes: Phase difference detection range: − The minimum width pump up and pump down current pulses occur at the Phase comparator input from the R Divider R ...
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Physical Dimensions www.national.com inches (millimeters) unless otherwise noted 16-Pin Thin Shrink Small Outline Package Order Number LMX2324TM, LMX2324TMX NS Package Number MTC16 12 101030 Version 8 Revision 1 Print Date/Time: 2010/03/17 20:00:58 ...
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... Chip Scale Package Order Number LMX2324SLBX NS Package Number SLB16A 13 101030 Version 8 Revision 1 Print Date/Time: 2010/03/17 20:00:58 www.national.com ...
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