M41ST84WMQ6E STMicroelectronics, M41ST84WMQ6E Datasheet - Page 10

IC RTC 3.0V 512BIT NVRAM 16SOIC

M41ST84WMQ6E

Manufacturer Part Number
M41ST84WMQ6E
Description
IC RTC 3.0V 512BIT NVRAM 16SOIC
Manufacturer
STMicroelectronics
Type
Clock/Calendar/Supervisorr
Datasheet

Specifications of M41ST84WMQ6E

Memory Size
64B
Time Format
HH:MM:SS:hh (24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-2802-5
M41ST84WMQ6

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M41ST84WMQ6E
Manufacturer:
ST
Quantity:
20 000
Operating modes
2
2.1
10/36
Operating modes
The M41ST84W clock operates as a slave device on the serial bus. Access is obtained by
implementing a start condition followed by the correct slave address (D0h). The 64 bytes
contained in the device can then be accessed sequentially in the following order:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11. - 16. Alarm registers
17. - 19. Reserved
20.
21. - 64. User RAM
The M41ST84W clock continually monitors V
V
address counter. Inputs to the device will not be recognized at this time to prevent erroneous
data from being written to the device from a an out-of-tolerance system. When V
below V
ultra low current mode of operation to conserve battery life. As system power returns and
V
external V
For more information on battery storage life refer to application note AN1012.
2-wire bus characteristics
The bus is intended for communication between different ICs. It consists of two lines: a bi-
directional data signal (SDA) and a clock signal (SCL). Both the SDA and SCL lines must be
connected to a positive supply voltage via a pull-up resistor.
The following protocol has been defined:
CC
CC
fall below V
rises above V
Data transfer may be initiated only when the bus is not busy.
During data transfer, the data line must remain stable whenever the clock line is high.
Changes in the data line, while the clock line is high, will be interpreted as control
signals.
SO
Tenths/hundredths of a second register
Seconds register
Minutes register
Century/hours register
Day register
Date register
Month register
Year register
Control register
Watchdog register
Square wave register
CC
, the device automatically switches over to the battery and powers down into an
. Write protection continues until V
PFD
SO
, the device terminates an access in progress and resets the device
, the battery is disconnected, and the power supply is switched to
Doc ID 7530 Rev 9
CC
CC
for an out-of tolerance condition. Should
reaches V
PFD
(min) plus t
rec
(min).
M41ST84W
CC
falls

Related parts for M41ST84WMQ6E