AD9235BRUZ-40 Analog Devices Inc, AD9235BRUZ-40 Datasheet - Page 8

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AD9235BRUZ-40

Manufacturer Part Number
AD9235BRUZ-40
Description
IC ADC 12BIT 40MSPS 28-TSSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9235BRUZ-40

Data Interface
Parallel
Number Of Bits
12
Sampling Rate (per Second)
40M
Number Of Converters
3
Power Dissipation (max)
165mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-TSSOP (0.173", 4.40mm Width)
Resolution (bits)
12bit
Sampling Rate
40MSPS
Input Channel Type
Differential, Single Ended
Supply Voltage Range - Analog
2.7V To 3.6V
Supply Current
55mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9235BCP-65EBZ - BOARD EVAL FOR AD9235BCP-65AD9235BCP-40EBZ - BOARD EVAL FOR AD9235BCP-40AD9235BCP-20EBZ - BOARD EVAL FOR AD9235BCP-20AD9235-65PCB - BOARD EVAL FOR AD9235-65AD9235-40PCB - BOARD EVAL FOR AD9235-40AD9235-20PCB - BOARD EVAL FOR AD9235-20
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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Quantity
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Part Number:
AD9235BRUZ-40
Manufacturer:
AD
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Manufacturer:
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AD9235
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Table 6. Pin Function Descriptions
Pin No.
28-Lead TSSOP
1
2
3
4
5
6
7, 12
8, 11
9
10
13
14
15 to 22, 25 to 28
23
24
SENSE
Figure 3. 28-Lead TSSOP Pin Configuration
MODE
PDWN
AGND
AGND
REFB
AVDD
AVDD
VREF
REFT
VIN+
VIN–
OTR
CLK
Pin No.
32-Lead LFCSP
21
22
23
24
25
26
27, 32
28, 31
29
30
2
4
7 to 14, 17 to 20
15
16
1, 3, 5, 6
10
11
12
13
14
1
2
3
4
5
6
7
8
9
(Not to Scale)
TOP VIEW
AD9235
28
26
25
24
23
22
21
20
19
18
17
16
15
27
Mnemonic
OTR
MODE
SENSE
VREF
REFB
REFT
AVDD
AGND
VIN+
VIN–
CLK
PDWN
D0 (LSB) to D11 (MSB)
DGND
DRVDD
DNC
D11 (MSB)
D10
D9
D8
DRVDD
DGND
D7
D6
D5
D4
D3
D2
D1
D0 (LSB)
Rev. C | Page 8 of 40
Description
Out-of-Range Indicator.
Data Format and Clock Duty Cycle Stabilizer (DCS) Mode Selection.
Reference Mode Selection.
Voltage Reference Input/Output.
Differential Reference (−).
Differential Reference (+).
Analog Power Supply.
Analog Ground.
Analog Input Pin (+).
Analog Input Pin (−).
Clock Input Pin.
Power-Down Function Selection (Active High).
Data Output Bits.
Digital Output Ground.
Digital Output Driver Supply. Must be decoupled to DGND with a minimum.
0.1 µF capacitor. Recommended decoupling is 0.1 µF in parallel with 10 µF.
Do Not Connect.
DNC = DO NOT CONNECT
(LSB)D0
Figure 4. 32-Lead LFCSP Pin Configuration
PDWN
DNC
DNC
DNC
DNC
CLK
D1
1
2
3
4
5
6
7
8
(Not to Scale)
PIN 1
INDICATOR
AD9235
TOP VIEW
24
23
22
21
20
19
18
17
VREF
SENSE
MODE
OTR
D11(MSB)
D10
D9
D8

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