MAX11610EEE+ Maxim Integrated Products, MAX11610EEE+ Datasheet - Page 20

IC ADC SERIAL 10BIT 12CH 16-QSOP

MAX11610EEE+

Manufacturer Part Number
MAX11610EEE+
Description
IC ADC SERIAL 10BIT 12CH 16-QSOP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX11610EEE+

Number Of Bits
10
Sampling Rate (per Second)
94.4k
Data Interface
I²C, Serial
Number Of Converters
1
Power Dissipation (max)
3.35mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SSOP (0.150", 3.90mm Width)
Resolution
10 bit
Interface Type
I2C
Snr
60 dB
Voltage Reference
4.096 V
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Power Dissipation
666.7 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Input Voltage
5 V
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Aperture delay (t
edge of the sampling clock and the instant when an
actual sample is taken.
For a waveform perfectly reconstructed from digital sam-
ples, the theoretical maximum SNR is the ratio of the full-
scale analog input (RMS value) to the RMS quantization
error (residual error). The ideal, theoretical minimum ana-
log-to-digital noise is caused by quantization error only
and results directly from the ADC’s resolution (N Bits):
In reality, there are other noise sources besides quanti-
zation noise: thermal noise, reference noise, clock jitter,
etc. SNR is computed by taking the ratio of the RMS
signal to the RMS noise, which includes all spectral
components minus the fundamental, the first five har-
monics, and the DC offset.
Signal-to-noise plus distortion (SINAD) is the ratio of the
fundamental input frequency’s RMS amplitude to RMS
equivalent of all other ADC output signals.
Effective number of bits (ENOB) indicates the global
accuracy of an ADC at a specific input frequency and
Low-Power, 4-/8-/12-Channel, I
10-Bit ADCs in Ultra-Small Packages
20
SINAD (dB) = 20
______________________________________________________________________________________
SNR
MAX[dB]
Signal-to-Noise Plus Distortion
AD
) is the time between the falling

= 6.02
log (SignalRMS/NoiseRMS)
Effective Number of Bits
Signal-to-Noise Ratio
dB

N + 1.76
Aperture Delay
dB
sampling rate. An ideal ADC’s error consists of quanti-
zation noise only. With an input range equal to the
ADC’s full-scale range, calculate the ENOB as follows:
Total harmonic distortion (THD) is the ratio of the RMS
sum of the input signal’s first five harmonics to the fun-
damental itself. This is expressed as:
where V
are the amplitudes of the 2nd through 5th order harmonics.
Spurious-free dynamic range (SFDR) is the ratio of RMS
amplitude of the fundamental (maximum signal compo-
nent) to the RMS value of the next largest distortion
component.
PROCESS: BiCMOS
SINAD dB
1
THD
is the fundamental amplitude, and V
(
2
=
ENOB = (SINAD - 1.76)/6.02
C,
)
20
=
Spurious-Free Dynamic Range
20
×
log
×
log
Total Harmonic Distortion
NoiseRMS THDRMS
V
2
2
Chip Information
+
SignalRMS
V
3
2
V
+
1
+
V
4
2
+
V
5
2
2
through V
5

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