LM97593VH/NOPB National Semiconductor, LM97593VH/NOPB Datasheet - Page 29

• Manufacturer Part Number: LM97593VH/NOPB
• Description: IC DDC ADC/TUNER/AGC 128-PQFP
• Manufacturer: National Semiconductor

Specifications of LM97593VH/NOPB

• Number Of Bits: 12
• Sampling Rate (per Second): 65M
• Data Interface: Serial
• Number Of Converters: 2
• Power Dissipation (max): 560mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-BFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LM97593VH

is an unsigned 16-bit number. P ranges from 0 to 2
Phase dithering can be enabled to reduce the spurious sig-
nals created by the NCO due to phase truncation. This trun-
cation is unavoidable since the frequency resolution is much
finer than the phase resolution. With dither enabled, spurs
due to phase truncation are below -100 dBc for all frequencies
and phase offsets. Each NCO has its own dither source and
the initial state of one is maximally offset with respect to the
other so that they are effectively uncorrelated. The phase
dither sources are on by default. They are independently con-
trolled by the DITH_A and DITH_B bits. The amplitude reso-
lution of the ROM creates a worst-case spur amplitude of
-101dBc rendering amplitude dither unnecessary.
The spectrum plots in Figure 20 and Figure 21show the ef-
fectiveness of phase dither in reducing NCO spurs due to
phase truncation for a worst-case example (just below F
With dither off, the spur is at -86.4dBFS. With dither on, the
spur is below -125dBFS, disappearing into the noise floor.
This spur is spread into the noise floor which results in an SNR
of -83.6dBFS. The channel filter’s processing gain will further
improve the SNR.
Figure 22 shows the spur levels as the tuning frequency is
scanned over a narrow portion of the frequency range. The
spurs are again a result of phase quantization but their loca-
tions move about as the frequency scan progresses. As be-
fore, the peak spur level drops when dithering is enabled.
When dither is enabled and the fundamental frequency is ex-
actly at F
tion can be observed at -101dBc in Figure 23.
4.2 Four Stage CIC Filter
The mixer outputs are decimated by a factor of N in a four
stage CIC filter. N is programmable to any integer between 8
and 2048. Decimation is programmed in the DEC register
where DEC = N - 1. The programmable decimation allows the
chip’s usable output bandwidth to range from about ±1.27kHz
to ±650kHz when the input data rate (which is equal to the
chip’s clock rate, F
rate of 65MHz, the LM97593’s output bandwidth will range
from about ±1.58kHz to ±812kHz. A block diagram of the CIC
filter is shown in Figure 24.
The CIC filter is primarily used to decimate the high-rate in-
coming data while providing a rough lowpass characteristic.
The lowpass filter will have a sin(x)/x response (similar to the
AGC’s CIC shown in Figure 39) where the first null is at F
maximum headroom through the CIC filter. For optimal noise
performance the SCALE value is set to increase this level until
S
/8, the worst-case spur due to amplitude quantiza-
CK
) is 52 MHz. For the maximum sample
FIGURE 24. Four-stage decimate by N CIC filter
π
(1-2
S
S
-16
/8).
/N.
).
29
The CIC filter has a gain equal to N
which must be compensated for in the “SHIFT UP” circuit
shown in Figure 24 as well as Figure 19. This circuit has a
gain equal to 2
This circuit divides the input signal by 2
the CIC filter is just below the point of distortion. A value is
normally calculated and loaded for SCALE such that
FIGURE 23. Worst Case Amplitude Spur, NCO at F
FIGURE 22. NCO Spurs due to Phase Quantization
Complex NCO Output Phase Dither Disabled
Complex NCO Output Phase Dither Enabled
(SCALE-44)
, where SCALE ranges from 0 to 40.
4
44
(filter decimation^4)
providing
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30008720
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/8