LTC1609CSW#TRPBF Linear Technology, LTC1609CSW#TRPBF Datasheet - Page 18

• Manufacturer Part Number: LTC1609CSW#TRPBF
• Description: IC ADC SRL 16BIT 200KSPS 20-SOIC
• Manufacturer: Linear Technology

Specifications of LTC1609CSW#TRPBF

• Number Of Bits: 16
• Sampling Rate (per Second): 200k
• Data Interface: Serial
• Number Of Converters: 1
• Power Dissipation (max): 100mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (0.300", 7.50mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

APPLICATIO S I FOR ATIO
LTC1609
18
DCLK IN
R/C IN
CS IN
Figure 12. Conversion and Read Timing Using an External Data Clock (EXT/INT Tied High).
Read Previous Conversion Result During the Conversion. For Best Performance, Complete Read in Less Than 1.2 s
EXTERNAL
DATACLK
SYNC
DATA
BUSY
TAG
Figure 13. Two LTC1609s Cascaded
Together Using the TAG Input
R/C
TAG
CS
LTC1609
#2
DATA
DCLK
U
R/C
CS
U
t
16
t
2
TAG
LTC1609
0
#1
W
t
t
17
13
DATA
DCLK
R/C
CS
1
1609 F13
t
t
TAG0
12
t
23
t
15
12
U
DATA OUT
2
(MSB)
TAG1
t
B15
14
t
t
18
24
3
TAG2
B14
bit will be shifted out on the following clock pulse before
the MSB from device #2 becomes available (Figure 14).
The reason for this is the MSB from device #2 will not be
valid soon enough to meet the minimum setup time of
device #1’s TAG input. A minimum of 34 clock pulses are
needed to shift out the results from both LTC1609s
assuming the data is captured on the falling clock edge.
Using the highest frequency permitted for DATACLK
(20MHz), a 200kHz throughput can still be achieved.
4
TAG3
B13
t
3
16
TAG15
B1
17
TAG16
B0
18
TAG17
TAG0
t
19
TAG18
TAG1
TAG19
1606 F12
1609fa