UDA1330ATS/N2,112 NXP Semiconductors, UDA1330ATS/N2,112 Datasheet - Page 10

IC AUDIO DAC STEREO 16-SSOP

UDA1330ATS/N2,112

Manufacturer Part Number
UDA1330ATS/N2,112
Description
IC AUDIO DAC STEREO 16-SSOP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of UDA1330ATS/N2,112

Number Of Bits
20
Data Interface
Serial
Number Of Converters
2
Voltage Supply Source
Analog and Digital
Power Dissipation (max)
75mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Settling Time
-
Other names
568-3442-5
935262880112
UDA1330ATSDK
NXP Semiconductors
Programming the features
When the data transfer of type ‘status’ is selected, the features for the system clock frequency and the data input format
can be controlled.
Table 6 Data transfer of type ‘status’
When the data transfer of type ‘data’ is selected, the features for volume, de-emphasis and mute can be controlled.
Table 7 Data transfer of type ‘data’
2001 Feb 02
handbook, full pagewidth
BIT 7
BIT 7
Low-cost stereo filter DAC
0
1
0
0
1
1
BIT 6
BIT 6
0
0
0
1
0
1
L3CLOCK
L3MODE
BIT 5
BIT 5
L3DATA
SC1
VC5
0
0
0
0
BIT 4
BIT 4
SC0
VC4
DE1
0
0
0
BIT 3
BIT 3
VC3
DE0
IF2
0
0
0
address
BIT 2
BIT 2
VC2
IF1
MT
0
0
0
Fig.6 Multibyte data transfer.
data byte #1
BIT 1
BIT 1
VC1
IF0
0
0
0
0
10
BIT 0
BIT 0
VC0
t stp(L3)
0
0
0
0
1
SC = system clock frequency (2 bits); see Table 8
IF = data input format (3 bits); see Table 9
not used
VC = volume control (6 bits); see Table 11
not used
DE = de-emphasis (2 bits); see Table 10
MT = mute (1 bit); see Table 12
default setting
data byte #2
REGISTER SELECTED
REGISTER SELECTED
address
MGL725
UDA1330ATS
Product specification

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