AD5331BRUZ Analog Devices Inc, AD5331BRUZ Datasheet - Page 11

IC DAC 10BIT SNGL VOUT 20TSSOP

AD5331BRUZ

Manufacturer Part Number
AD5331BRUZ
Description
IC DAC 10BIT SNGL VOUT 20TSSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5331BRUZ

Data Interface
Parallel
Settling Time
7µs
Number Of Bits
10
Number Of Converters
1
Voltage Supply Source
Single Supply
Power Dissipation (max)
1.25mW
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Resolution (bits)
10bit
Sampling Rate
143kSPS
Input Channel Type
Parallel
Supply Voltage Range - Analog
2.5V To 5.5V
Supply Current
140µA
Number Of Channels
1
Resolution
10b
Conversion Rate
143KSPS
Interface Type
Parallel
Single Supply Voltage (typ)
3.3/5V
Dual Supply Voltage (typ)
Not RequiredV
Architecture
Resistor-String
Power Supply Requirement
Single
Output Type
Voltage
Integral Nonlinearity Error
±4LSB
Single Supply Voltage (min)
2.5V
Single Supply Voltage (max)
5.5V
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Package Type
TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD5331BRUZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD5331BRUZ-REEL7
Manufacturer:
ADI/亚德诺
Quantity:
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TERMINOLOGY
Relative Accuracy or Integral Nonlinearity (INL)
For the DAC, relative accuracy or INL is a measure of the
maximum deviation, in LSBs, from a straight line passing
through the actual endpoints of the DAC transfer function.
Typical INL vs. code plots can be seen in Figure 14, Figure 15,
and Figure 16.
Differential Nonlinearity (DNL)
DNL is the difference between the measured change and the
ideal 1 LSB change between any two adjacent codes. A specified
differential nonlinearity of ±1 LSB maximum ensures mono-
tonicity. This DAC is guaranteed monotonic by design. Typical
DNL vs. code plots can be seen in Figure 17, Figure 18, and
Figure 19.
Gain Error
This is a measure of the span error of the DAC (including any
error in the gain of the buffer amplifier). It is the deviation in
slope of the actual DAC transfer characteristic from the ideal,
expressed as a percentage of the full-scale range. This is
illustrated in Figure 11.
Offset Error
This is a measure of the offset error of the DAC and the output
amplifier. It is expressed as a percentage of the full-scale range.
If the offset voltage is positive, the output voltage is still positive
at zero input code. This is shown in Figure 12. Because the
DACs operate from a single supply, a negative offset cannot
appear at the output of the buffer amplifier. Instead, there is
a code close to zero at which the amplifier output saturates
(amplifier footroom). Below this code, there is a deadband over
which the output voltage does not change. This is illustrated in
Figure 13.
VOLTAGE
OUTPUT
Figure 11. Gain Error
DAC CODE
ACTUAL
POSITIVE
GAIN ERROR
NEGATIVE
GAIN ERROR
IDEAL
Rev. A | Page 11 of 28
FOOTROOM
NEGATIVE
AMPLIFIER
NEGATIVE
POSITIVE
OFFSET
OFFSET
OFFSET
VOLTAGE
(~1mV)
VOLTAGE
OUTPUT
OUTPUT
AD5330/AD5331/AD5340/AD5341
Figure 13. Negative Offset Error and Gain Error
Figure 12. Positive Offset Error and Gain Error
DEADBAND CODES
DAC CODE
DAC CODE
ACTUAL
ACTUAL
GAIN ERROR
AND
OFFSET ERROR
IDEAL
GAIN ERROR
AND
OFFSET ERROR
IDEAL

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