PEF80912HV14XT Lantiq, PEF80912HV14XT Datasheet - Page 28

• Manufacturer Part Number: PEF80912HV14XT
• Manufacturer: Lantiq

Specifications of PEF80912HV14XT

• Lead Free Status / Rohs Status: Supplier Unconfirmed

DT: Data Through test mode
EI1: Error Indication 1
PU: Power-Up
RES: Reset
SSP: Send Single Pulses test mode
TIM: Timing request
2.3.5
2.3.5.1
The state machines control the sequence of signals at the U-interface that are generated
during the start-up procedure. The informations contained in the following state diagrams
are:
– State name
– U-signal transmitted
– Overhead bits transmitted
– C/I-code transmitted
– Transition criteria
– Timers
Figure 9
•
Figure 9
Combinations of transition criteria are possible. Logical “AND” is indicated by “&” (TN &
DC), logical “OR” is written “or” and for a negation “/” is used. The start of a timer is
indicated with “TxS” (“x” being equivalent to the timer number). Timers are always
started when entering the new state. The action resulting after a timer has expired is
indicated by the path labelled “TxE”.
Data Sheet
shows how to interpret the state diagrams.
State Machine for Line Activation / Deactivation
Notation
Explanation of State Diagram Notation
Signal Transmitted
to U-Interface
(general)
Indication Transmitted on C/I-Channel
State Name
(DOUT)
OUT
20
IN
to U-Interface
Transmitted
Single Bit
ITD04257.vsd
Functional Description
PEF 80912/80913
2001-03-29