PEF80912HV14XT Lantiq, PEF80912HV14XT Datasheet - Page 75

• Manufacturer Part Number: PEF80912HV14XT
• Manufacturer: Lantiq

Specifications of PEF80912HV14XT

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Table 22
V
Parameter
Detection Threshold
Hysteresis
Max. rising/falling V
edge for activation/
deactivation of UVD
Max. rising V
power-on
Min. operating voltage
Delay for activation
of RSTO
Delay for deactivation
of RSTO
1)
2)
Data Sheet
DD
The Detection Threshold V
Q-SMINT
neither performance and functionality of the Q-SMINT
If the integrated Power-On Reset of the Q-SMINTO is selected (VDDDET = ’0’) and the supply voltage V
ramped up from 0V to 3.3V +/- 5%, then the Q-SMINTO is kept in reset during V
V
already finished start-up. The start-up time of the oscillator circuit is typically in the range between 3ms and
12ms.
DD
= 3.3 V ± 5 %; V
must be ramped up so slowly that the Q-SMINTO leaves the reset state after the oscillator circuit has
2)
®
O. Therefore, the board designer must take into account that a range of voltages is existing, where
DD
Parameters of the UVD/POR Circuit
for
DD
1)
SS
DET
= 0 V; T
Symbol
V
V
dV
V
t
t
ACT
DEACT
is far below the specified supply voltage range of analog and digital parts of the
DET
Hys
DDmin
DD
/dt
A
= -40 to 85 °C
min.
2.7
30
1.5
Limit Values
67
® O are guaranteed, nor a reset is generated.
typ.
2.8
64
max.
2.92
90
0.1
0.1
10
Electrical Characteristics
Unit Test Condition
V
mV
V/µs
V/
ms
V
µs
ms
DDmin
PEF 80912/80913
V
DD
< V
DD
= 3.3 V ± 5 %
< V
2001-03-29
DET
+ V
DD
Hys
is
.