RCGD16589FB Intel, RCGD16589FB Datasheet - Page 7

no-image

RCGD16589FB

Manufacturer Part Number
RCGD16589FB
Description
Manufacturer
Intel
Datasheet

Specifications of RCGD16589FB

Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
132
Lead Free Status / Rohs Status
Not Compliant
Pin List
Data Sheet Rev.: 13
Mnemonic:
DI0,
DI1,
DI2,
DI3,
DI4,
DI5,
DI6,
DI7,
DI8,
DI9,
DI10,
DI11,
DI12,
DI13,
DI14,
DI15,
REFCK, REFCKN
SEL1, SEL2
SEL3
CKI, CKIN
OUT, OUTN
CKOUT, CKOUTN
PCTL
PCTLX
(PHIGH, PLOW)
VCTL
VCUR
NLDET
SGNX
TCK
VDD
VDDA
VDDO
DIN0
DIN1
DIN2
DIN3
DIN4
DIN5
DIN6
DIN7
DIN8
DIN9
DIN10
DIN11
DIN12
DIN13
DIN14
DIN15
H4-9, J1-2, J6, J8,
A2, A5, D1-2, D6,
E4-9, F1-2, F4-9,
F11, G1-2, G4-9,
A7, C5 (D5),
G11, H12
C11, C12
D12, E12
B10, A11
L12, L11
Pin No.:
J12, J11
C7, D7
L9, M9
L8, M8
M5, L5
M4, L4
L3, M2
H1, E1
B3, C4
A8, B8
A9, B9
B5, A6
A3, B4
B6, B7
J5 (K5)
L6, K6
K3, L2
L1, K2
K12
C3
C6
C1
C2
A4
B1
K1
K8
A1
Open Collector
Open Collector
Open Collector
Analogue Out
Analogue Out
Analogue In
Analogue In
Pin Type:
CML Out
LVDS In
LVDS In
CML In
ECL In
ECL In
ECL In
ECL In
PWR
PWR
PWR
GD16585/GD16589
Description:
Data input, differential 622 Mbit/s. Multiplexed to serial output
starting with DI0, DI1...DI15.
Note:
The bit naming convention is opposite to OIF99.102.5:
DI0 is MSB. Please refer to item “Bit Order” on
Reference clock input, differential 155 MHz or 622 MHz.
Select the set-up and hold time beetwen the data and clock inputs
in four settings. For setting, please refer to
page
When left open, the inputs are pulled to “1” (VDD).
Select the reference clock frequency.
0
1
When left open, the input is pulled to “1” (VDD).
Data clock input.
Data output, differential 10 Gbit/s. No internal ESD output pro-
tection.
Clock output, differential 622 MHz. Always terminate by 50 W to
VDD.
Charge pump output for CMU PLL.
Charge pump output from PFCX to external VCXO.
Not used. Always terminate to VDD.
VCO input voltage control.
Output voltage control.
No Lock DETect output. Always terminate with a resistor to VDD.
Selects between positive and negative VCXO constant.
0
1
When left open, the input is pulled to “1” (VDD).
Used for test purpose. Connect to VDD.
Digital Ground 0 V.
PLL Ground 0 V.
VCO Ground 0 V. For test purpose connect to VEE.
14.
155 MHz
622 MHz
Positive VCXO constant
Negative VCXO constant
Figure 13
page 2.
and table on
Page 7 of 17

Related parts for RCGD16589FB