TXC-06312BIOG Transwitch Corporation, TXC-06312BIOG Datasheet - Page 37

• Manufacturer Part Number: TXC-06312BIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-06312BIOG

• Lead Free Status / Rohs Status: Supplier Unconfirmed

3 7 o f 2 0 2
MPCLK
MPA13
MPA12
MPA11
MPA10
MPA09
MPA08
MPA07
MPA06
MPA05
MPA04
MPA03
MPA02
MPA01
MPA00
MPD15
MPD14
MPD13
MPD12
MPD11
MPD10
MPD09
MPD08
MPD07
MPD06
MPD05
MPD04
MPD03
MPD02
MPD01
MPD00
MPSEL
MPTS
Symbol
GENERIC INTEL - HOST PROCESSOR INTERFACE
Lead No. I/O/P
M1
C2
D2
C1
G4
D1
G3
H4
G2
H3
G1
H2
H1
B1
E4
E3
F4
B2
E2
F3
E1
F2
F1
K4
K3
K2
K1
J4
J3
J2
J1
L4
L3
I/O(T)
I
I
I
I
LVCMOS
LVTTL/
LVTTL Microprocessor Interface Clock: This lead is the clock
LVTTL Address Bus: These leads are the address bus used by the
LVTTL PHAST-12N Chip Select (Active Low): This active low lead
LVTTL Read Strobe (Active low): This active low lead initiates a read
Type
8mA
- Lead Descriptions -
sourced by the microprocessor being interfaced to this device.
Its max. frequency is 50 MHz.
Intel notation: CLK
host processor for accessing the PHAST-12N for a read or
write cycle.
MPA13 is the most significant bit in the location’s address.
Intel notation: A[ ]
Data Bus: These leads are the bidirectional data bus used for
transferring data between the PHAST-12N and the host pro-
cessor.
MPD15 is the most significant bit.
Intel notation: D[ ]
enables data transfers between the host processor and the
PHAST-12N through a read or write cycle.
Intel notation: CS
transfer between the host processor and the PHAST-12N.
Intel notation: RD
Name/Function
PRELIMINARY TXC-06312B-MB, Ed. 2
PHAST-12N Device
DATA SHEET
TXC-06312B
June 2005