TXC-06312BIOG Transwitch Corporation, TXC-06312BIOG Datasheet - Page 67

• Manufacturer Part Number: TXC-06312BIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-06312BIOG

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Notes:
1. The relationship represented between CBADJ0J1 and REFSYSFS is only valid for the Add Telecom Bus operating in
2. For the Add Telecom Bus, an additional delay of 0 up to 15 clock cycles (see also
6 7 o f 2 0 2
LINETXCLK
LINETXCLK clock pulse width
REFSYSFS pulse width
REFSYSFS to CBADJ0J1
REFSYSFS to CBDPJ0J1
master mode.
Add Bus Timing and Add Bus Data/Parity signals (see also
t
OFFSET_ADD
LINETXCLK
REFSYSFS
CBADJ0J1
CBDPJ0J1
(Output)
(Output)
(Output)
(Output)
(Output)
Figure 17. Relationship Between REFSYSFS, Add and Drop Telecom Bus Timing Signals
= 22, when TimingDelay = 15
Parameter
t
CYC
t
PWH
- Timing Characteristics -
,
t
OFFSET_ADD
t
t
PW_SYSFS
D
t
OFFSET_ADD
t
OFFSET_DROP
t
t
OFFSET_ADD
OFFSET_DROP
t
PW_SYSFS
= 7.
Symbol
t
t
PWH
CYC
“Add Bus Delay” on page
Min
40
7
t
D
Figure
PRELIMINARY TXC-06312B-MB, Ed. 2
12.86
12.86
Typ
50
22
26
7) can be inserted between the
134). When TimingDelay = 0,
PHAST-12N Device
12.86
t
Max
D
60
22
DATA SHEET
TXC-06312B
%t
t
t
Unit
June 2005
CYC
CYC
ns
ns
CYC