ISP1583BS,518 NXP Semiconductors, ISP1583BS,518 Datasheet - Page 56

• Manufacturer Part Number: ISP1583BS,518
• Manufacturer: NXP Semiconductors

Specifications of ISP1583BS,518

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Compliant

NXP Semiconductors
Table 67.
CS1_N = HIGH, CS0_N = LOW, DA2 = HIGH, MODE0/DA1 = LOW, BUS_CONF/DA0 = HIGH.
Table 68.
CS1_N = HIGH, CS0_N = LOW, DA2 = HIGH, MODE0/DA1 = HIGH, BUS_CONF/DA0 = LOW.
Table 69.
CS1_N = HIGH, CS0_N = LOW, DA2 = HIGH, MODE0/DA1 = HIGH, BUS_CONF/DA0 = HIGH.
[1]
Table 70.
CS1_N = LOW, CS0_N = HIGH, DA2 = HIGH, MODE0/DA1 = HIGH, BUS_CONF/DA0 = LOW.
Table 71.
CS1_N = LOW, CS0_N = HIGH, DA2 = HIGH, MODE0/DA1 = HIGH, BUS_CONF/DA0 = HIGH.
ISP1583_7
Product data sheet
Bit
Symbol
Reset
Bus reset
Access
Bit
Symbol
Reset
Bus reset
Access
Bit
Symbol
Reset
Bus reset
Access
Bit
Symbol
Reset
Bus reset
Access
Bit
Symbol
Reset
Bus reset
Access
Task File register 1F7 is a write-only register; a read will return FFh.
Task File 1F5 register (address: 4Ch): bit allocation
Task File 1F6 register (address: 4Dh): bit allocation
Task File 1F7 register (address: 44h): bit allocation
Task File 3F6 register (address: 4Eh): bit allocation
Task File 3F7 register (address: 4Fh): bit allocation
R/W
R/W
R/W
R/W
W
7
0
0
7
0
0
7
0
0
7
0
0
7
0
0
R/W
R/W
R/W
R/W
W
6
0
0
6
0
0
6
0
0
6
0
0
6
0
0
cylinder high/LBA[23:16] (ATA) or cylinder high (ATAPI)
R/W
command (ATA) or status
R/W
R/W
R/W
drive/head/LBA[27:24] (ATA) or drive (ATAPI)
W
5
0
0
5
0
0
5
0
0
5
0
0
5
0
0
alternate status/command (ATA or ATAPI)
Rev. 07 — 22 September 2008
drive address (ATA) or reserved (ATAPI)
R/W
R/W
R/W
R/W
W
4
0
0
4
0
0
4
0
0
4
0
0
4
0
0
[1]
/command (ATAPI)
R/W
R/W
R/W
R/W
W
3
0
0
3
0
0
3
0
0
3
0
0
3
0
0
Hi-Speed USB peripheral controller
R/W
R/W
R/W
R/W
W
2
0
0
2
0
0
2
0
0
2
0
0
2
0
0
R/W
R/W
R/W
R/W
W
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
© NXP B.V. 2008. All rights reserved.
ISP1583
R/W
R/W
R/W
R/W
W
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
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