DSPB56721AF Freescale Semiconductor, DSPB56721AF Datasheet - Page 43

• Manufacturer Part Number: DSPB56721AF
• Description: AUDIO PROCESSOR SYMPH 80-LQFP
• Manufacturer: Freescale Semiconductor
• Series: Symphony™r
• Type: Audio Processorr

Specifications of DSPB56721AF

• Interface: Host Interface, I²C, SAI, SPI
• Clock Rate: 200MHz
• Non-volatile Memory: External
• On-chip Ram: 744kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.00V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 80-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2.20
The DSP56721 device does not have an EMC module. For EMC timing parameters in DSP56720 devices, see
Table
Chapter 22, “External Memory Controller (EMC),” in the Symphony DSP56720/DSP56721 Multi-Core Audio Processors
Reference Manual explains in detail the interfacing and features of EMC. The applicable sections are as follows:
Freescale Semiconductor
LCLK cycle time
LCLK skew to LSYNC_OUT
Input setup to LSYNC_IN (except LGTA/LUPWAIT)
Input hold from LSYNC_IN (except LGTA/LUPWAIT)
LGTA valid time
LUPWAIT valid time
LALE negedge to LAD(address phase) invaild (address latch hold time)
LALE valid time
Output setup from LSYNC_IN (except LAD[23:0] and LALE)
Output hold from LSYNC_IN (except LAD[23:0] and LALE)
LAD[23:0] output setup from LSYNC_IN
LAD[23:0] output hold from LSYNC_IN
LSYNC_IN to output high impedance for LAD[23:0]
•
•
19; for timing diagrams, see
Section 22.4.4.3, “UPM Signal Timing”
Section 22.4.4.7, “Memory System Interface Example Using UPM”
EMC Timing (DSP56720 Only)
(Output)
STCLK
SRCK
(Input)
Table 17. EMC Timing Parameters (EMC PLL Enabled; LCRR[CLKDIV] = 2)
Symphony
Parameter
Figure 38
™
Figure 37. S/PIDF STCLK Timing Diagram
Figure 36. S/PDIF SRCK Timing Diagram
DSP56720/DSP56721 Multi-Core Audio Processors, Rev. 5
through
Figure
srckpl
stclkpl
V
V
40.
M
M
srckp
stclkp
T
Symbol
T
clk_skew
T
T
T
T
T
T
T
T
upwait
T
T
T
ale_h
out_s
out_h
ad_h
ad_s
ad_z
in_s
in_h
ale
gta
clk
srckph
stclkph
V
V
M
M
Min
3.8
3.5
1.5
10
12
12
—
—
3
2
3
4
2
Max
160
4.3
—
—
—
—
—
—
—
—
—
—
—
Table
17, through
Unit
ns
ps
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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