DSP56301AG80 Freescale Semiconductor, DSP56301AG80 Datasheet - Page 105

• Manufacturer Part Number: DSP56301AG80
• Description: IC DSP 24BIT 80MHZ GP 208-LQFP
• Manufacturer: Freescale Semiconductor
• Series: DSP563xxr
• Type: Fixed Pointr

Specifications of DSP56301AG80

• Interface: Host Interface, SSI, SCI
• Clock Rate: 80MHz
• Non-volatile Memory: ROM (9 kB)
• On-chip Ram: 24kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.3 Power Consumption Considerations
Power dissipation is a key issue in portable DSP applications. Some of the factors affecting current consumption
are described in this section. Most of the current consumed by CMOS devices is alternating current (ac), which is
charging and discharging the capacitances of the pins and internal nodes.
Current consumption is described by this formula:
Where:
The maximum internal current (I
case operation conditions—not necessarily a real application case. The typical internal current (I
reflects the average switching of the internal buses on typical operating conditions. Perform the following steps for
applications that require very low current consumption:
One way to evaluate power consumption is to use a current-per-MIPS measurement methodology to minimize
specific board effects (that is, to compensate for measured board current not caused by the DSP). A benchmark
power consumption test algorithm is listed in Appendix A. Use the test algorithm, specific test current
measurements, and the following equation to derive the current-per-MIPS value.
Freescale Semiconductor
For a Port A address pin loaded with 50 pF capacitance, operating at 3.3 V, with a 66 MHz clock, toggling at its maximum possible rate (33
MHz), the current consumption is expressed in Equation 4.
•
•
•
C
V
f
If multiple DSP devices are on the same board, check for cross-talk or excessive spikes on the supplies due
to synchronous operation of the devices.
RESET
deassertion of
At power-up, ensure that the voltage difference between the 5 V tolerant pins and the chip V
exceeds 3.5 V.
1.
2.
3.
4.
5.
6.
7.
Equation 3:
Equation 4:
Set the EBD bit when you are not accessing external memory.
Minimize external memory accesses, and use internal memory accesses.
Minimize the number of pins that are switching.
Minimize the capacitive load on the pins.
Connect the unused inputs to pull-up or pull-down resistors.
Disable unused peripherals.
Disable unused pin activity (for example, CLKOUT, XTAL).
must be asserted when the chip is powered up. A stable
=
=
=
node/pin capacitance
voltage swing
frequency of node/pin toggle
RESET
I
I
=
=
C
.
50 10
×
×
V f
CCI
×
max) value reflects the typical possible switching of the internal buses on best-
–
12
×
Example 1. Current Consumption
DSP56301 Technical Data, Rev. 10
3.3
×
33
×
10
6
=
5.48 mA
EXTAL
signal should be supplied before
Power Consumption Considerations
CCItyp
CC
) value
never
4-3