EP1S10F780C7 Altera, EP1S10F780C7 Datasheet - Page 90

IC STRATIX FPGA 10K LE 780-FBGA

EP1S10F780C7

Manufacturer Part Number
EP1S10F780C7
Description
IC STRATIX FPGA 10K LE 780-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheet

Specifications of EP1S10F780C7

Number Of Logic Elements/cells
10570
Number Of Labs/clbs
1057
Total Ram Bits
920448
Number Of I /o
426
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
Family Name
Stratix
Number Of Logic Blocks/elements
10570
# I/os (max)
426
Frequency (max)
420.17MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
10570
Ram Bits
920448
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
780
Package Type
FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-1112

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PLLs & Clock Networks
2–76
Stratix Device Handbook, Volume 1
Figure 2–43. Regional Clocks
Fast Regional Clock Network
In EP1S25, EP1S20, and EP1S10 devices, there are two fast regional clock
networks, FCLK[1..0], within each quadrant, fed by input pins that can
connect to fast regional clock networks (see
larger devices, there are two fast regional clock networks within each
half-quadrant (see
clock networks. All devices have eight FCLK pins to drive fast regional
clock networks. Any I/O pin can drive a clock or control signal onto any
fast regional clock network with the addition of a delay. This signal is
driven via the I/O interconnect. The fast regional clock networks can also
be driven from internal logic elements.
RCLK[1..0]
RCLK[4..5]
CLK[3..0]
Figure
2–45). Dual-purpose FCLK pins drive the fast
RCLK[6..7]
RCLK[2..3]
CLK[7..4]
RCLK[12..13]
RCLK[11..10]
CLK[15..12]
Figure
Regional Clocks Only Drive a Device
Quadrant from Specified CLK Pins or
PLLs within that Quadrant
2–44). In EP1S30 and
Altera Corporation
CLK[11..8]
RCLK[14..15]
July 2005
RCLK[9..8]

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