EP2C70F672I8N Altera, EP2C70F672I8N Datasheet - Page 14

IC CYCLONE II FPGA 70K 672-FBGA

EP2C70F672I8N

Manufacturer Part Number
EP2C70F672I8N
Description
IC CYCLONE II FPGA 70K 672-FBGA
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet

Specifications of EP2C70F672I8N

Number Of Logic Elements/cells
68416
Number Of Labs/clbs
4276
Total Ram Bits
1152000
Number Of I /o
422
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
672-FBGA
Family Name
Cyclone® II
Number Of Logic Blocks/elements
68416
# I/os (max)
422
Frequency (max)
402.58MHz
Process Technology
90nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
68416
Ram Bits
1152000
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
672
Package Type
FBGA
For Use With
P0304 - DE2-70 CALL FOR ACADEMIC PRICING544-1703 - VIDEO KIT W/CYCLONE II EP2C70N544-1699 - DSP KIT W/CYCLONE II EPS2C70N
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2143

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Logic Elements
Figure 2–1. Cyclone II EP2C20 Device Block Diagram
Logic Elements
2–2
Cyclone II Device Handbook, Volume 1
M4K Blocks
Embedded
Multipliers
IOEs
PLL
PLL
phase-align double data rate (DDR) signals) provide interface support for
external memory devices such as DDR, DDR2, and single data rate (SDR)
SDRAM, and QDRII SRAM devices at up to 167 MHz.
Figure 2–1
The number of M4K memory blocks, embedded multiplier blocks, PLLs,
rows, and columns vary per device.
The smallest unit of logic in the Cyclone II architecture, the LE, is compact
and provides advanced features with efficient logic utilization. Each LE
features:
Logic
Array
A four-input look-up table (LUT), which is a function generator that
can implement any function of four variables
A programmable register
A carry chain connection
A register chain connection
The ability to drive all types of interconnects: local, row, column,
register chain, and direct link interconnects
Support for register packing
Support for register feedback
shows a diagram of the Cyclone II EP2C20 device.
Logic
Array
IOEs
IOEs
Logic
Array
Logic
Array
IOEs
PLL
PLL
M4K Blocks
Altera Corporation
February 2007

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