EP2C70F672I8N Altera, EP2C70F672I8N Datasheet - Page 147

IC CYCLONE II FPGA 70K 672-FBGA

EP2C70F672I8N

Manufacturer Part Number
EP2C70F672I8N
Description
IC CYCLONE II FPGA 70K 672-FBGA
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet

Specifications of EP2C70F672I8N

Number Of Logic Elements/cells
68416
Number Of Labs/clbs
4276
Total Ram Bits
1152000
Number Of I /o
422
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
672-FBGA
Family Name
Cyclone® II
Number Of Logic Blocks/elements
68416
# I/os (max)
422
Frequency (max)
402.58MHz
Process Technology
90nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
68416
Ram Bits
1152000
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
672
Package Type
FBGA
For Use With
P0304 - DE2-70 CALL FOR ACADEMIC PRICING544-1703 - VIDEO KIT W/CYCLONE II EP2C70N544-1699 - DSP KIT W/CYCLONE II EPS2C70N
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2143

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Figure 5–4. High-Speed I/O Timing Budget
Note to
(1)
Altera Corporation
February 2008
Internal Clock Period
f
(input
clock
frequency)
Device
operation
in Mbps
t
H S C L K
D U T Y
Table 5–48. RSDS Transmitter Timing Specification (Part 1 of 2)
Symbol
The equation for the high-speed I/O timing budget is:
period = TCCS + RSKM + SW + RSKM.
Figure
5–4:
Conditions
×10
×10
×8
×7
×4
×2
×1
×8
×7
×4
×2
×1
0.5 × TCCS
Table 5–48
311 Mbps. RSDS is supported for transmitting from Cyclone II devices.
Cyclone II devices cannot receive RSDS data because the devices are
intended for applications where they will be driving display drivers.
Cyclone II devices support a maximum RSDS data rate of 311 Mbps using
DDIO registers. Cyclone II devices support RSDS only in the commercial
temperature range.
Min
100
10
10
10
10
10
10
80
70
40
20
10
45
–6 Speed Grade
Typ
RSKM
shows the RSDS timing budget for Cyclone II devices at
Max(1)
155.5
155.5
155.5
155.5
155.5
311
311
311
311
311
311
311
55
Note (1)
Min
100
10
10
10
10
10
10
80
70
40
20
10
45
–7 Speed Grade
DC Characteristics and Timing Specifications
Typ
SW
Max(1)
Cyclone II Device Handbook, Volume 1
155.5
155.5
155.5
155.5
155.5
311
311
311
311
311
311
311
55
Min
100
10
10
10
10
10
10
80
70
40
20
10
45
–8 Speed Grade
RSKM
Typ
0.5 × TCCS
Max(1)
155.5
155.5
155.5
155.5
155.5
311
311
311
311
311
311
311
55
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
MHz
MHz
MHz
MHz
MHz
MHz
Unit
%
5–57

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