EP1S30F1020C6 Altera, EP1S30F1020C6 Datasheet - Page 81

• Manufacturer Part Number: EP1S30F1020C6
• Description: IC STRATIX FPGA 30K LE 1020-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S30F1020C6

• Number Of Logic Elements/cells: 32470
• Number Of Labs/clbs: 3247
• Total Ram Bits: 3317184
• Number Of I /o: 726
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1020-FBGA
• Family Name: Stratix
• Number Of Logic Blocks/elements: 32470
• # I/os (max): 726
• Frequency (max): 450.05MHz
• Process Technology: 0.13um (CMOS)
• Operating Supply Voltage (typ): 1.5V
• Logic Cells: 32470
• Ram Bits: 3317184
• Operating Supply Voltage (min): 1.425V
• Operating Supply Voltage (max): 1.575V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1020
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 544-1419; EP1S30SF1020C6

Figure 2–37. Multiply-Accumulate Mode
Notes to
(1)
(2)
Altera Corporation
July 2005
Data B
Data A
These signals are not registered or registered once to match the data path pipeline.
These signals are not registered, registered once, or registered twice for latency to match the data path pipeline.
Shiftout B Shiftout A
Figure
Shiftin B
2–37:
ENA
ENA
D
D
CLRN
CLRN
Shiftin A
Q
Q
signa (1)
signb (1)
clock
Multiply-Accumulator Mode
In multiply-accumulator mode (see
multiplied results to the adder/subtractor/accumulator block configured
as an accumulator. You can implement one or two multiply-accumulators
up to 18 × 18 bits in one DSP block. The first and third multiplier sub-
blocks are unused in this mode, because only one multiplier can feed one
of two accumulators. The multiply-accumulator output can be up to 52
bits—a maximum of a 36-bit result with 16 bits of accumulation. The
accum_sload and overflow signals are only available in this mode.
The addnsub signal can set the accumulator for decimation and the
overflow signal indicates underflow condition.
Two-Multipliers Adder Mode
The two-multipliers adder mode uses the adder/subtractor/accumulator
block to add or subtract the outputs of the multiplier block, which is
useful for applications such as FFT functions and complex FIR filters. A
ena
aclr
ENA
D
CLRN
Q
accum_sload (2)
addnsub (2)
signa (2)
signb (2)
Figure
Accumulator
Stratix Device Handbook, Volume 1
2–37), the DSP block drives
ENA
D
CLRN
Stratix Architecture
Q
Data Out
overflow
2–67