EP1SGX25DF672C5N Altera, EP1SGX25DF672C5N Datasheet - Page 233

• Manufacturer Part Number: EP1SGX25DF672C5N
• Description: IC STRATIX GX FPGA 25K 672-FBGA
• Manufacturer: Altera
• Series: Stratix® GXr

Specifications of EP1SGX25DF672C5N

• Number Of Logic Elements/cells: 25660
• Number Of Labs/clbs: 2566
• Total Ram Bits: 1944576
• Number Of I /o: 455
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 672-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Figure 6–5. Stratix GX Transceiver Reset & PLL Lock Time Waveform
Note to
(1)
Altera Corporation
June 2006
Waveforms are for minimum pulse width timing and output timing only. Please refer to the Stratix GX Transceiver
User Guide for the complete reset sequence.
Figure
6–5:
unreg_data-out
reg_data-out
rdaddress
Tables 6–44
all Stratix GX devices.
t
t
t
t
t
t
t
SU
H
CO
LUT
CLR
PRE
CLKHL
Table 6–44. LE Internal Timing Microparameters
rden
Symbol
doutn-2
through
t
WERESU
-5 Speed Grade -6 Speed Grade -7 Speed Grade
doutn-1
bn
Min
100
100
100
100
10
6–50
show the internal timing microparameters for
Max
156
366
doutn-1
Min
100
100
100
100
10
Stratix GX Device Handbook, Volume 1
doutn
Note (1)
Max
DC & Switching Characteristics
b0
176
459
t
t
Min
DATACO1
114
114
114
114
WEREH
11
t
DATACO2
Max
202
527
t
RC
doutn
Unit
ps
ps
ps
ps
ps
ps
ps
6–31