EP2S130F1020C5N Altera, EP2S130F1020C5N Datasheet - Page 74

• Manufacturer Part Number: EP2S130F1020C5N
• Description: IC STRATIX II FPGA 130K 1020FBGA
• Manufacturer: Altera
• Series: Stratix® IIr

Specifications of EP2S130F1020C5N

• Number Of Logic Elements/cells: 132540
• Number Of Labs/clbs: 6627
• Total Ram Bits: 6747840
• Number Of I /o: 742
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1020-FBGA
• Family Name: Stratix II
• Number Of Logic Blocks/elements: 132540
• # I/os (max): 742
• Frequency (max): 609.76MHz
• Process Technology: 90nm (CMOS)
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 132540
• Ram Bits: 6747840
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1020
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-1867; EP2S130F1020C5N

PLLs & Clock Networks
2–66
Stratix II Device Handbook, Volume 1
c4
c5
Enhanced PLL 11 outputs
c0
c1
c2
c3
c4
c5
Clock pins
CLK4p
CLK5p
CLK6p
CLK7p
CLK4n
CLK5n
CLK6n
CLK7n
Drivers from internal logic
GCLKDRV0
GCLKDRV1
GCLKDRV2
Top Side Global & Regional
Table 2–11. Global & Regional Clock Connections from Top Clock Pins & Enhanced PLL Outputs
of 2)
Clock Network Connectivity
Table 2–12. Global & Regional Clock Connections from Bottom Clock Pins & Enhanced PLL
Outputs
Regional Clock Network
Bottom Side Global &
Connectivity
(Part 1 of 2)
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Altera Corporation
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May 2007
(Part 2
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