EP2S130F1508I5 Altera, EP2S130F1508I5 Datasheet - Page 12

IC STRATIX II FPGA 130K 1508FBGA

EP2S130F1508I5

Manufacturer Part Number
EP2S130F1508I5
Description
IC STRATIX II FPGA 130K 1508FBGA
Manufacturer
Altera
Series
Stratix® IIr
Datasheet

Specifications of EP2S130F1508I5

Number Of Logic Elements/cells
132540
Number Of Labs/clbs
6627
Total Ram Bits
6747840
Number Of I /o
1126
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1508-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-

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Altera
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0
Logic Array Blocks
Figure 2–2. Stratix II LAB Structure
2–4
Stratix II Device Handbook, Volume 1
Direct link
interconnect from
adjacent block
Direct link
interconnect to
adjacent block
LAB Interconnects
The LAB local interconnect can drive ALMs in the same LAB. It is driven
by column and row interconnects and ALM outputs in the same LAB.
Neighboring LABs, M512 RAM blocks, M4K RAM blocks, M-RAM
blocks, or DSP blocks from the left and right can also drive an LAB's local
interconnect through the direct link connection. The direct link
connection feature minimizes the use of row and column interconnects,
providing higher performance and flexibility. Each ALM can drive
24 ALMs through fast local and direct link interconnects.
shows the direct link connection.
Local Interconnect
LAB
from Either Side by Columns & LABs,
Local Interconnect is Driven
& from Above by Rows
Row Interconnects of
Variable Speed & Length
ALMs
Column Interconnects of
Variable Speed & Length
Altera Corporation
Direct link
interconnect from
adjacent block
Direct link
interconnect to
adjacent block
Figure 2–3
May 2007

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