MPC8272CVRMIBA Freescale Semiconductor, MPC8272CVRMIBA Datasheet - Page 5

• Manufacturer Part Number: MPC8272CVRMIBA
• Description: IC MPU POWERQUICC II 516-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8272CVRMIBA

• Processor Type: MPC82xx PowerQUICC II 32-bit
• Speed: 266MHz
• Voltage: 1.5V
• Mounting Type: Surface Mount
• Package / Case: 516-PBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Freescale Semiconductor
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Integrated security engine (SEC) (MPC8272 and MPC8248 only)
— Supports DES, 3DES, MD-5, SHA-1, AES, PKEU, RNG and RC-4 encryption algorithms
Communications processor module (CPM)
— Embedded 32-bit communications processor (CP) uses a RISC architecture for flexible support
— Interfaces to G2_LE core through on-chip dual-port RAM and DMA controller. (Dual-port
Universal serial bus (USB) controller
— Supports USB 2.0 full/low rate compatible
— USB host mode
— Supports USB slave mode
— Serial DMA channels for receive and transmit on all serial channels
— Parallel I/O registers with open-drain and interrupt capability
— Virtual DMA functionality executing memory-to-memory and memory-to-I/O transfers
— Two fast communication controllers (FCCs) supporting the following protocols:
— Three serial communications controllers (SCCs) identical to those on the MPC860 supporting
in hardware
for communications peripherals
RAM size is 16 Kbyte plus 4Kbyte dedicated instruction RAM.)
– Supports control, bulk, interrupt, and isochronous data transfers
– CRC16 generation and checking
– NRZI encoding/decoding with bit stuffing
– Supports both 12- and 1.5-Mbps data rates (automatic generation of preamble token and
– Flexible data buffers with multiple buffers per frame
– Supports local loopback mode for diagnostics (12 Mbps only)
– Four independent endpoints support control, bulk, interrupt, and isochronous data transfers
– CRC16 generation and checking
– CRC5 checking
– NRZI encoding/decoding with bit stuffing
– 12- or 1.5-Mbps data rate
– Flexible data buffers with multiple buffers per frame
– Automatic retransmission upon transmit error
– 10-/100-Mbit Ethernet/IEEE 802.3 CDMA/CS interface through media independent
– Transparent
– HDLC—up to T3 rates (clear channel)
– One of the FCCs supports ATM (MPC8272 and MPC8271 only)—full-duplex SAR at 155
the digital portions of the following protocols:
data rate configuration). Note that low-speed operation requires an external hub.
interface (MII)
Mbps, 8-bit UTOPIA interface 31 Mphys, AAL5, AAL1, AAL2, AAL0 protocols, TM 4.0
CBR, VBR, UBR, ABR traffic types, up to 64-K external connections
MPC8272 PowerQUICC II™ Family Hardware Specifications, Rev. 2
Overview
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