MPC862PZQ100B Freescale Semiconductor, MPC862PZQ100B Datasheet - Page 62

IC MPU POWERQUICC 100MHZ 357PBGA

MPC862PZQ100B

Manufacturer Part Number
MPC862PZQ100B
Description
IC MPU POWERQUICC 100MHZ 357PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC862PZQ100B

Processor Type
MPC8xx PowerQUICC 32-Bit
Speed
100MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Family Name
MPC8xx
Device Core
PowerQUICC
Device Core Size
32b
Frequency (max)
100MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.465/3.6V
Operating Supply Voltage (min)
2/3.135V
Operating Temp Range
0C to 105C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
357
Package Type
BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC862PZQ100B
Manufacturer:
Freescale
Quantity:
177
Part Number:
MPC862PZQ100B
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
CPM Electrical Characteristics
62
(Output)
RSTRT
RCLK1
(Input)
RxD1
TENA(RTS1)
RENA(CD1)
REJECT
(Output)
(NOTE 2)
TCLK1
(Input)
TxD1
(Input)
MPC862/857T/857DSL PowerQUICC™ Family Hardware Specifications, Rev. 3
NOTES:
0
1.
2.
128
Transmit clock invert (TCI) bit in GSMR is set.
If RENA is deasserted before TENA, or RENA is not asserted at all during transmit, then the
CSL bit is set in the buffer descriptor at the end of the frame transmission.
Figure 63. CAM Interface Receive Start Timing Diagram
133
131
Figure 64. CAM Interface REJECT Timing Diagram
Start Frame Delimiter
Figure 62. Ethernet Transmit Timing Diagram
1
128
1
121
137
BIT1
125
132
129
BIT2
136
Freescale Semiconductor
134

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