MPC885ZP80 Freescale Semiconductor, MPC885ZP80 Datasheet - Page 18
MPC885ZP80
Manufacturer Part Number
MPC885ZP80
Description
IC MPU POWERQUICC 80MHZ 357PBGA
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC880VR80.pdf
(87 pages)
Specifications of MPC885ZP80
Processor Type
MPC8xx PowerQUICC 32-Bit
Speed
80MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
For Use With
CWH-PPC-885XN-VX - BOARD EVAL QUICCSTART MPC885CWH-PPC-885XN-VE - BOARD EVAL QUICCSTART MPC885
Features
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC885ZP80
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Bus Signal Timing
18
B11a
B12a
B13a
B16a
Num
B7a
B7b
B8a
B8b
B11
B12
B13
B14
B15
B16
B5
B7
B8
B9
CLKOUT fall time
CLKOUT to A(0:31), BADDR(28:30), RD/WR,
BURST, D(0:31) output hold (MIN = 0.25
CLKOUT to TSIZ(0:1), REG, RSV, BDIP , PTR
output hold (MIN = 0.25
CLKOUT to BR, BG, FRZ, VFLS(0:1), VF(0:2)
IWP(0:2), LWP(0:1), STS output hold
(MIN = 0.25
CLKOUT to A(0:31), BADDR(28:30) RD/WR,
BURST, D(0:31) valid (MAX = 0.25
CLKOUT to TSIZ(0:1), REG, RSV, AT(0:3) BDIP,
PTR valid (MAX = 0.25
CLKOUT to BR, BG, VFLS(0:1), VF(0:2),
IWP(0:2), FRZ, LWP(0:1), STS valid
(MAX = 0.25
CLKOUT to A(0:31), BADDR(28:30), RD/WR,
BURST, D(0:31), TSIZ(0:1), REG, RSV, AT(0:3),
PTR High-Z (MAX = 0.25
CLKOUT to TS, BB assertion
(MAX = 0.25
CLKOUT to TA, BI assertion (when driven by the
memory controller or PCMCIA interface)
(MAX = 0.00
CLKOUT to TS, BB negation
(MAX = 0.25
CLKOUT to TA, BI negation (when driven by the
memory controller or PCMCIA interface)
(MAX = 0.00
CLKOUT to TS, BB High-Z (MIN = 0.25
CLKOUT to TA, BI High-Z (when driven by the
memory controller or PCMCIA interface)
(MIN = 0.00
CLKOUT to TEA assertion
(MAX = 0.00
CLKOUT to TEA High-Z (MIN = 0.00
TA, BI valid to CLKOUT (setup time)
(MIN = 0.00
TEA, KR, RETRY, CR valid to CLKOUT (setup
time) (MIN = 0.00
×
×
×
×
×
×
×
×
×
B1)
B1 + 2.5)
B1 + 6.00)
B1 + 6.3)
B1 + 6.0)
B1 + 9.30
B1 + 4.8)
B1 + 9.00)
B1 + 9.00)
Characteristic
MPC885/MPC880 PowerQUICC Hardware Specifications, Rev. 7
×
B1 + 4.5)
×
×
1
Table 9. Bus Operation Timings (continued)
×
)
B1 + 6.3)
B1)
B1 + 6.3)
×
4
×
B1 + 6.3)
B1 + 2.50) 2.50 15.00 2.50 15.00 2.50 15.00 2.50 15.00
×
×
B1)
B1)
7.60
7.60
7.60
7.60 13.80 6.30 12.50 3.80 10.00 3.13
7.60 13.60 6.30 12.30 3.80
2.50
7.60 12.30 6.30 11.00 3.80
2.50
7.60 21.60 6.30 20.30 3.80 14.00 3.13 12.93
2.50 15.00 2.50 15.00 2.50 15.00
2.50
6.00
4.50
Min
—
—
—
—
33 MHz
13.80
13.80
13.80
Max
4.00
9.30
9.00
9.00
—
—
—
—
—
6.30
6.30
6.30
2.50
2.50
2.50
6.00
4.50
Min
—
—
—
—
40 MHz
12.50
12.50
12.50
Max
4.00
9.30
9.00
9.00
—
—
—
—
—
3.80
3.80
3.80
2.50
2.50
2.50
6.00
4.50
Min
—
—
—
—
66 MHz
10.00
10.00
10.00
Max
4.00
9.80
9.30
8.50
9.00
9.00
—
—
—
—
—
Freescale Semiconductor
3.13
3.13
3.13
3.13
2.50
3.13
2.50
4.50
Min
2.5
2.5
—
—
—
—
6
80 MHz
15.00
Max
4.00
9.43
9.43
9.43
9.43
9.13
9.30
7.92
9.00
9.00
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns