MPC885ZP80 Freescale Semiconductor, MPC885ZP80 Datasheet - Page 21

IC MPU POWERQUICC 80MHZ 357PBGA

MPC885ZP80

Manufacturer Part Number
MPC885ZP80
Description
IC MPU POWERQUICC 80MHZ 357PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC885ZP80

Processor Type
MPC8xx PowerQUICC 32-Bit
Speed
80MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
For Use With
CWH-PPC-885XN-VX - BOARD EVAL QUICCSTART MPC885CWH-PPC-885XN-VE - BOARD EVAL QUICCSTART MPC885
Features
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC885ZP80
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Freescale Semiconductor
B29h
B30a
B30b
B30d
B31a
B31b
B31d
Num
B30c
B31c
B29i
B30
B31
WE(0:3) negated to D(0:31) High-Z GPCM write
access, TRLX = 1, CSNT = 1, EBDF = 1
(MIN = 0.375 × B1 – 3.30)
CS negated to D(0:31) High-Z GPCM write
access, TRLX = 1, CSNT = 1, ACS = 10 or
ACS = 11, EBDF = 1 (MIN = 0.375 × B1 – 3.30)
CS, WE(0:3) negated to A(0:31), BADDR(28:30)
Invalid GPCM read/write access
(MIN = 0.25 × B1 – 2.00)
WE(0:3) negated to A(0:31), BADDR(28:30)
Invalid GPCM, write access, TRLX = 0, CSNT = 1,
CS negated to A(0:31) invalid GPCM write access
TRLX = 0, CSNT =1 ACS = 10, or ACS == 11,
EBDF = 0 (MIN = 0.50 × B1 – 2.00)
WE(0:3) negated to A(0:31) invalid GPCM
BADDR(28:30) invalid GPCM write access,
TRLX = 1, CSNT = 1. CS negated to A(0:31)
invalid GPCM write access TRLX = 1, CSNT = 1,
ACS = 10, or ACS == 11 EBDF = 0
(MIN = 1.50 × B1 – 2.00)
WE(0:3) negated to A(0:31), BADDR(28:30)
invalid GPCM write access, TRLX = 0, CSNT = 1.
CS negated to A(0:31) invalid GPCM write
access, TRLX = 0, CSNT = 1 ACS = 10,
ACS == 11, EBDF = 1 (MIN = 0.375 × B1 – 3.00)
WE(0:3) negated to A(0:31), BADDR(28:30)
invalid GPCM write access TRLX = 1, CSNT =1,
CS negated to A(0:31) invalid GPCM write access
TRLX = 1, CSNT = 1, ACS = 10 or 11, EBDF = 1
CLKOUT falling edge to CS valid, as requested by
control bit CST4 in the corresponding word in the
UPM (MAX = 0.00 × B1 + 6.00)
CLKOUT falling edge to CS valid, as requested by
control bit CST1 in the corresponding word in the
UPM (MAX = 0.25 × B1 + 6.80)
CLKOUT rising edge to CS valid, as requested by
control bit CST2 in the corresponding word in the
UPM (MAX = 0.00 × B1 + 8.00)
CLKOUT rising edge to CS valid, as requested by
control bit CST3 in the corresponding word in the
UPM (MAX = 0.25 × B1 + 6.30)
CLKOUT falling edge to CS valid, as requested by
control bit CST1 in the corresponding word in the
UPM EBDF = 1 (MAX = 0.375 × B1 + 6.6)
Characteristic
MPC885/MPC880 PowerQUICC Hardware Specifications, Rev. 7
Table 9. Bus Operation Timings (continued)
8
38.40
38.40
13.20
43.50
38.67
13.30 18.00 11.30 16.00 7.60 12.30 4.69 11.30
5.60
8.40
1.50
7.60 14.30 6.30 13.00 3.80 10.50 3.13 10.00
1.50
7.60 13.80 6.30 12.50 3.80 10.00 3.13
Min
33 MHz
Max
6.00
8.00
31.10
31.10
10.50
35.50
31.38
4.30
6.40
1.50
1.50
Min
40 MHz
Max
6.00
8.00
17.50
17.50
20.70
17.83
1.80
5.60
2.70
1.50
1.50
Min
66 MHz
Max
6.00
8.00
13.85
13.85
16.75
14.19
1.13
4.25
1.70
1.50
1.50
Min
80 MHz
Bus Signal Timing
Max
6.00
8.00
9.40
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
21

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