IDT79RC32T351-133DH IDT, Integrated Device Technology Inc, IDT79RC32T351-133DH Datasheet - Page 2

• Manufacturer Part Number: IDT79RC32T351-133DH
• Description: IC MPU 32BIT CORE 133MHZ 208-QFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: Interprise™r

Specifications of IDT79RC32T351-133DH

• Processor Type: RISC 32-Bit
• Speed: 133MHz
• Voltage: 2.5V
• Mounting Type: Surface Mount
• Package / Case: 208-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Other names: 79RC32T351-133DH

IDT 79RC32351
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– Supports burst transfers
– Revision 1.1 compliant
– USB slave device controller
– Supports a 6
– Full speed operation at 12 Mb/s
– Supports control, interrupt, bulk and isochronous endpoints
– Supports USB remote wakeup
– Integrated USB transceiver
– Run-time Mode provides a standard JTAG interface
– Real-Time Mode provides additional pins for real-time trace
– Full duplex support for 10 and 100 Mb/s Ethernet
– IEEE 802.3u compatible Media Independent Interface (MII)
– IEEE 802.3u auto-negotiation for automatic speed selection
– Flexible address filtering modes
– 64-entry hash table based multicast address filtering
USB
EJTAG
Ethernet
information
with serial management interface
th
USB endpoint
Debug port
USB to PC
Figure 2 Example of xDSL Residential Gateway Using RC32351
Interrupt Ctl
Channels
Timers
UART
DMA
USB
Ethernet Transceiver
RC32300 CPU Core
Ethernet MAC
2 of 42
MII I/F
Ethernet to PC
I/O Controller
Data Buffers
SDRAM Ctl
Memory &
ATM I/F
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– Can be configured as one UTOPIA level 1 interface or 1
– Supports 25Mb/s and faster ATM
– Supports UTOPIA data path interface operation at speeds up
– Supports standard 53-byte ATM cells
– Performs HEC generation and checking
– Cell processing discards short cells and clips long cells
– 16 cells worth of buffering
– UTOPIA modes: 8 cell input buffer and 8 cell output buffer
– Hardware support for CRC-32 generation and checking for
– Hardware support for CRC-10 generation and checking
– Virtual caching receive mechanism supports reception of any
– Frame Mode transmit mechanism supports transmission of
– JTAG interface (IEEE Std. 1149.1 compatible)
– 208 pin PQFP package
– 2.5V core supply and 3.3V I/O supply
– Up to 133 MHz pipeline frequency and up to 66 MHz bus
ATM SAR
System Features
UTOPIA level 2 interface with 2 address lines (3 PHYs max)
to 33 MHz
AAL5
length packet without CPU intervention on up to eight simulta-
neously active receive channels
any length packet without CPU intervention
frequency
32-bit Data Bus
Clock
Memory & I/O
Transmission
Convergence
SDRAM
Data Pump
AFE
May 25, 2004