IDT79RC32T351-133DH IDT, Integrated Device Technology Inc, IDT79RC32T351-133DH Datasheet - Page 8

• Manufacturer Part Number: IDT79RC32T351-133DH
• Description: IC MPU 32BIT CORE 133MHZ 208-QFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: Interprise™r

Specifications of IDT79RC32T351-133DH

• Processor Type: RISC 32-Bit
• Speed: 133MHz
• Voltage: 2.5V
• Mounting Type: Surface Mount
• Package / Case: 208-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Other names: 79RC32T351-133DH

GPIOP[24]
GPIOP[25]
GPIOP[26]
GPIOP[27]
GPIOP[28]
GPIOP[29]
GPIOP[30]
GPIOP[31]
GPIOP[32]
GPIOP[33]
GPIOP[34]
GPIOP[35]
DMA
DMAFIN
DMAREQN
DMADONEN
USB
USBCLKP
USBDN
USBDP
USBSOF
Ethernet
MIICOLP
MIICRSP
MIIMDCP
IDT 79RC32351
Name
Type I/O Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
I
I
I
I
I
High Drive General Purpose I/O. This pin can be configured as an auxiliary general purpose I/O pin.
High Drive General Purpose I/O. This pin can be configured as an auxiliary general purpose I/O pin.
Low Drive
Low Drive
Low Drive
Low Drive
Low Drive
Low Drive
Low Drive
Low Drive
Low Drive
Low Drive
Low Drive USB start of frame.
Low Drive MII Management Data Clock. This signal is used as a timing reference for transmission of data on the management inter-
with STI
with STI
with STI
with STI
with STI
with STI
with STI
with STI
with STI
with STI
USB
USB
Low
STI
STI
STI
STI
STI
General Purpose I/O. This pin can be configured as a general purpose I/O pin.
Alternate function: ATM receive PHY address, RXADDR[0].
General Purpose I/O. This pin can be configured as a general purpose I/O pin.
1st Alternate function: ATM receive PHY address, RXADDR[1].
2nd Alternate function: Active DMA channel code, DMAP[1].
General Purpose I/O. This pin can be configured as a general purpose I/O pin.
General Purpose I/O. This pin can be configured as a general purpose I/O pin.
Alternate function: Memory and peripheral bus address, MADDR[22].
General Purpose I/O. This pin can be configured as a general purpose I/O pin.
Alternate function: Memory and peripheral bus address, MADDR[23].
General Purpose I/O. This pin can be configured as a general purpose I/O pin.
Alternate function: Memory and peripheral bus address, MADDR[24].
General Purpose I/O. This pin can be configured as a general purpose I/O pin.
Alternate function: Memory and peripheral bus address, MADDR[25].
General Purpose I/O. This pin can be configured as a general purpose I/O pin.
1ST Alternate function: DMA finished, DMAFIN.
2nd Alternate function: EJTAG/ICE reset, EJTAG_TRST_N.
General Purpose I/O. This pin can be configured as an auxiliary general purpose I/O pin.
General Purpose I/O. This pin can be configured as an auxiliary general purpose I/O pin.
External DMA finished. This signal is asserted low by the RC32351 when the number of bytes specified in the DMA
descriptor have been transferred to or from an external device.
Primary function: General Purpose I/O, GPIOP[31]. At reset, this pin defaults to primary function GPIOP[31].
2nd Alternate function: EJTAG_TRST_N.
External DMA Device Request. The external DMA device asserts this pin low to request DMA service.
Primary function: General purpose I/O, GPIOP[18]. At reset, this pin defaults to primary function GPIOP[18].
External DMA Device Done. The external DMA device asserts this signal low to inform the RC32351 that it is done with
the current DMA transaction.
Primary function: General purpose I/O, GPIOP[19]. At reset, this pin defaults to primary function GPIOP[19].
USB Clock. 48 MHz clock input used as time base for the USB interface.
USB D- Data Line. This is the negative differential USB data signal.
USB D+ Data Line. This is the positive differential USB data signal.
Primary function: General Purpose I/O, GPIOP[20]. At reset, this pin defaults to primary function GPIOP[20].
MII Collision Detected. This signal is asserted by the ethernet PHY when a collision is detected.
MII Carrier Sense. This signal is asserted by the ethernet PHY when either the transmit or receive medium is not idle.
face.
Table 1 Pin Descriptions (Part 4 of 7)
8 of 42
Description
May 25, 2004