MC68EC040RC25A Freescale Semiconductor, MC68EC040RC25A Datasheet - Page 73

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MC68EC040RC25A

Manufacturer Part Number
MC68EC040RC25A
Description
IC MPU 32BIT 25MHZ 179-PGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68EC040RC25A

Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
179-PGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

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3.2.6.3 WRITE PROTECT. The M68040 provides write protection independent of other
protection mechanisms. All table and page descriptors contain W-bits to protect areas of
memory from write accesses of any kind, including supervisor writes. An ATC descriptor
corresponding to the logical address is created with the W-bit set after the table search is
completed when a table search encounters a W-bit set in any table or page descriptor.
The subsequent retry of the write access results in an access error exception being taken.
The W-bit can be used to protect the entire area of memory defined by a branch of the
translation table or protect only one or more pages from write accesses. Figure 3-18
illustrates a memory map of the logical address space organized to use supervisor-only
and write-protect bits for protection. Figure 3-19 illustrates an example translation table for
this technique.
3-24
URP FOR TASK 'A'
URP FOR TASK 'B'
COMMON SRP
FOR TASK 'A'
FOR TASK 'B'
Figure 3-17. Translation Table Structure for Two Tasks
POINTER
Figure 3-18. Logical Address Map with Shared
Freescale Semiconductor, Inc.
Supervisor and User Address Spaces
For More Information On This Product,
THIS AREA IS SUPERVISOR OR USER, READ/WRITE
THIS AREA IS SUPERVISOR OR USER, READ-ONLY
THIS AREA IS SUPERVISOR ONLY, READ/WRITE
THIS AREA IS SUPERVISOR ONLY, READ-ONLY
M68040 USER'S MANUAL
Go to: www.freescale.com
SUPERVISOR AND USER SPACE
SUPERVISOR A LEVEL TABLE
USER A LEVEL TABLE
USER A LEVEL TABLE
TRANSLATION
TRANSLATION
TABLE FOR
TASK 'A'
TRANSLATION
TABLE FOR
TASK 'B'
TABLE FOR
ALL SUPERVISOR
ACCESSES
MOTOROLA

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