MPC8540PX833LB Freescale Semiconductor, MPC8540PX833LB Datasheet - Page 13

• Manufacturer Part Number: MPC8540PX833LB
• Description: IC MPU 32BIT 833MHZ 783-FCPBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8540PX833LB

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 833MHz
• Voltage: 1.2V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Family Name: MPC85XX
• Device Core: PowerQUICC III
• Device Core Size: 32b
• Frequency (max): 833MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2V
• Operating Supply Voltage (max): 1.26V
• Operating Supply Voltage (min): 1.14V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 783
• Package Type: FCBGA
• For Use With: MPC8548CDS - DEV TOOLS CDS FOR 8548MPC8540ADS-BGA - BOARD APPLICATION DEV 8540CWH-PPC-8540N-VE - KIT EVAL SYSTEM MPC8540
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Not Compliant

MPC8540 Architecture Overview
3.5 Programmable Interrupt Controller (PIC)
The programmable interrupt controller (PIC) implements the necessary functions to provide a flexible solution for
a general-purpose interrupt control. The interrupt controller unit implements the logic and programming structures
of the OpenPIC architecture. The MPC8540 interrupt controller unit supports its processor core and provides for 12
external interrupts (with fully nested interrupt delivery), 4 message interrupts, internal-logic driven interrupts, and
4 global high resolution timers. Up to 16 programmable interrupt priority levels are supported.
The interrupt controller unit can be bypassed to allow use of an external interrupt controller. Inter-processor interrupt
(IPI) communication is supported through the external interrupt and core reset signals of different processor cores
on the same device. The four IPIs are only used for self-interrupt in a single-core device such as the MPC8540.
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3.6 I
C Controller
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The inter-IC (IIC or I
C) bus is a two-wire, bidirectional serial bus that provides a simple and efficient method of
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data exchange between devices. The synchronous, multiple master bus of the I
C allows the MPC8540 to exchange
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data with other I
C devices, such as microcontrollers, EEPROMs, real-time clock devices, A/D converters, and
LCDs. The two-wire bus (serial data SDA and serial clock SCL) minimizes the interconnections between devices.
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The synchronous, multiple master bus of the I
C allows the connection of additional devices to the bus for expansion
and system development.
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The I
C controller is a true multiple master bus; it includes collision detection and arbitration that prevents data
corruption if two or more masters attempt to control the bus simultaneously. This feature allows for complex
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applications with multiprocessor control. The I
C controller consists of a transmitter/receiver unit, a clocking unit,
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and a control unit. The I
C unit supports general broadcast mode, and on-chip filtering rejects spikes on the bus.
3.7 Boot Sequencer
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The MPC8540 provides a boot sequencer that uses the I
C interface to access an external serial ROM and loads the
data into the MPC8540’s configuration registers. The boot sequencer is enabled by a configuration pin sampled at
the negation of the MPC8540 hardware reset signal. If enabled, the boot sequencer holds the MPC8540 processor
core in reset until the boot sequence is complete. If the boot sequencer is not enabled, the processor core exits reset
and fetches boot code in default configurations.
3.8 Dual Universal Asynchronous Receiver/Transmitter (DUART)
The MPC8540 includes a DUART intended for use in maintenance, bringing-up, and debugging of systems. The
MPC8540 provides a standard four-wire handshake (SIN, SOUT, RTS, CTS) for each port. The DUART is a slave
interface. An interrupt is provided to the interrupt controller or optionally steered externally to allow device
handshakes. Interrupts are generated for transmit, receive, line status, and MODEM status.
The MPC8540 DUART supports full-duplex operation. It is compatible with the PC16450 and PC16550
programming models. Also, 16-byte FIFOs are supported for both the transmitter and the receiver.
Software programmable baud generators divide the system clock to generate a 16x clock. Serial interface data
formats (data length, parity, 1/1.5/2 STOP bit, baud rate) are also software selectable.
MPC8540 PowerQUICC III™ Integrated Host Processor Product Brief, Rev. 0.1
Freescale Semiconductor
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