Z8S18020FEC Zilog, Z8S18020FEC Datasheet - Page 42

IC Z180 MPU 80-QFP

Z8S18020FEC

Manufacturer Part Number
Z8S18020FEC
Description
IC Z180 MPU 80-QFP
Manufacturer
Zilog
Datasheet

Specifications of Z8S18020FEC

Processor Type
Z180
Features
Enhanced Z180
Speed
20MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
80-BQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3103

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the
vious contents of
the ASCI to control (start/stop) another communication de-
vices transmission (for example, by connecting to that de-
vice’s
having no side effects on other ASCI registers or flags.
Bit 4 in
These bits are cleared to
to
(
These bits program the ASCI data format as follows.
0
, the
bit for the most recent receive operation. When written
/
If bit 4 of the System Configuration Register is
,
When multiprocessor mode is enabled (
mode during
/
is undefined during
input).
,
),
function is selected to reset all error flags
pin exhibits the
and
is used.
,
, when read, contains the value of the
0
is essentially a 1-bit output port,
are held.
in the
on reset.
.
function.
.
is cleared to
Register) to
allows
0
in
0
in
0
,
.
The data formats available based on all combinations of
,
, and
are indicated in Table 9.
ZiLOG

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