XPC850DEZT50BT Freescale Semiconductor, XPC850DEZT50BT Datasheet - Page 12

• Manufacturer Part Number: XPC850DEZT50BT
• Description: IC POWER PC MPU 80MHZ 256-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of XPC850DEZT50BT

• Processor Type: MPC8xx PowerQUICC 32-Bit
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 256-PBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Other names: Q1146100; XPC8500DEZT50BT; XPC8500DEZT50BT

Bus Signal Timing
12
Num
B11a
B12a
B13a
B16a
B16b
B17a
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B9
MPC850 PowerQUICC™ Integrated Communications Processor Hardware Specifications, Rev. 2
CLKOUT to A[6–31] RD/WR,
BURST, D[0–31], DP[0–3],
TSIZ[0–1], REG, RSV, AT[0–3],
PTR high-Z
CLKOUT to TS, BB assertion
CLKOUT to TA, BI assertion,
(When driven by the memory
controller or PCMCIA interface)
CLKOUT to TS, BB negation
CLKOUT to TA, BI negation
(when driven by the memory
controller or PCMCIA interface)
CLKOUT to TS, BB high-Z
CLKOUT to TA, BI high-Z,
(when driven by the memory
controller or PCMCIA interface)
CLKOUT to TEA assertion
CLKOUT to TEA high-Z
TA, BI valid to CLKOUT(setup
time)
TEA, KR, RETRY, valid to
CLKOUT (setup time
BB, BG, BR valid to CLKOUT
(setup time)
CLKOUT to TA, TEA, BI, BB,
BG, BR valid (Hold time).
CLKOUT to KR, RETRY, except
TEA valid (hold time)
D[0–31], DP[0–3] valid to
CLKOUT rising edge (setup
time)
CLKOUT rising edge to
D[0–31], DP[0–3] valid (hold
time)
D[0–31], DP[0–3] valid to
CLKOUT falling edge (setup
time)
CLKOUT falling edge to
D[0–31], DP[0–3] valid (hold
time)
7
8
5
7
8
Characteristic
6
) 5
Table 6. Bus Operation Timing
5
10.00
5.00
5.00
2.50
5.00
2.50
5.00
2.50
2.50
2.50
9.75
8.50
1.00
2.00
6.00
1.00
4.00
2.00
Min
50 MHz
19.00
15.00
10.00
15.00
11.75
11.00
11.75
11.00
Max
9.25
—
—
—
—
—
—
—
—
—
10.00
7.58
7.58
2.50
7.58
2.50
7.58
2.50
2.50
2.50
9.75
8.50
1.00
2.00
6.00
1.00
4.00
2.00
Min
66 MHz
14.33
13.58
14.33
21.58
15.00
10.00
15.00
11.00
Max
9.25
—
—
—
—
—
—
—
—
—
1
(continued)
10.00
6.25
6.25
2.50
6.25
2.50
6.25
2.50
2.50
2.50
9.75
8.50
1.00
2.00
6.00
1.00
4.00
2.00
Min
80 MHz
13.00
12.25
13.00
11.00
20.25
15.00
10.00
15.00
Max
9.25
—
—
—
—
—
—
—
—
—
FFACT
0.250
0.250
0.250
0.250
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Freescale Semiconductor
Cap Load
(default
50 pF)
50.00
50.00
50.00
50.00
50.00
50.00
50.00
50.00
50.00
50.00
50.00
50.00
50.00
50.00
50.00
50.00
50.00
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
—