XPC850DEZT50BT Freescale Semiconductor, XPC850DEZT50BT Datasheet - Page 47

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XPC850DEZT50BT

Manufacturer Part Number
XPC850DEZT50BT
Description
IC POWER PC MPU 80MHZ 256-PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of XPC850DEZT50BT

Processor Type
MPC8xx PowerQUICC 32-Bit
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
256-PBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Other names
Q1146100
XPC8500DEZT50BT
XPC8500DEZT50BT

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Freescale Semiconductor
(FE=0, CE=0)
(FE=1, CE=1)
L1RSYNC
L1RCLK
L1RCLK
(Output)
L1ST n
L1RxD
(Input)
(Input)
(Input)
(Input)
1
2
3
4
MPC850 PowerQUICC™ Integrated Communications Processor Hardware Specifications, Rev. 2
Num
whichever is later.
83A
The ratio SyncCLK/L1RCLK must be greater than 2.5/1.
These specs are valid for IDL mode only.
Where P = 1/CLKOUT. Thus for a 25-MHz CLKO1 rate, P = 40 ns.
These strobes and TxD on the first bit of the frame become valid after L1CLK edge or L1SYNC,
82
83
84
85
86
87
88
Figure 45. SI Receive Timing Diagram with Normal Clocking (DSC = 0)
L1RCLK, L1TCLK frequency (DSC =1)
L1RCLK, L1TCLK width low (DSC =1)
L1RCLK, L1TCLK width high (DSC = 1)
L1CLK edge to L1CLKO valid (DSC = 1)
L1RQ valid before falling edge of L1TSYNC
L1GR setup time
L1GR hold time
L1xCLK edge to L1SYNC valid (FSD = 00) CNT =
0000, BYT = 0, DSC = 0)
73
71
76
2
Characteristic
75
74
Table 17. SI Timing (continued)
72
70
BIT0
RFSD=1
78
3
77
4
71a
P + 10
P + 10
42.00
42.00
1.00
Min
All Frequencies
SYNCCLK/2
16.00 or
79
30.00
Max
0.00
CPM Electrical Characteristics
L1TCLK
MHz
Unit
ns
ns
ns
ns
ns
ns
47

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